1 //===- CodeGenTarget.cpp - CodeGen Target Class Wrapper -------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This class wraps target description classes used by the various code
11 // generation TableGen backends. This makes it easier to access the data and
12 // provides a single place that needs to check it for validity. All of these
13 // classes throw exceptions on error conditions.
15 //===----------------------------------------------------------------------===//
17 #include "CodeGenTarget.h"
18 #include "CodeGenIntrinsics.h"
20 #include "llvm/ADT/StringExtras.h"
21 #include "llvm/Support/CommandLine.h"
22 #include "llvm/Support/Streams.h"
26 static cl::opt<unsigned>
27 AsmWriterNum("asmwriternum", cl::init(0),
28 cl::desc("Make -gen-asm-writer emit assembly writer #N"));
30 /// getValueType - Return the MVT::SimpleValueType that the specified TableGen
31 /// record corresponds to.
32 MVT::SimpleValueType llvm::getValueType(Record *Rec) {
33 return (MVT::SimpleValueType)Rec->getValueAsInt("Value");
36 std::string llvm::getName(MVT::SimpleValueType T) {
38 case MVT::Other: return "UNKNOWN";
39 case MVT::i1: return "MVT::i1";
40 case MVT::i8: return "MVT::i8";
41 case MVT::i16: return "MVT::i16";
42 case MVT::i32: return "MVT::i32";
43 case MVT::i64: return "MVT::i64";
44 case MVT::i128: return "MVT::i128";
45 case MVT::iAny: return "MVT::iAny";
46 case MVT::fAny: return "MVT::fAny";
47 case MVT::f32: return "MVT::f32";
48 case MVT::f64: return "MVT::f64";
49 case MVT::f80: return "MVT::f80";
50 case MVT::f128: return "MVT::f128";
51 case MVT::ppcf128: return "MVT::ppcf128";
52 case MVT::Flag: return "MVT::Flag";
53 case MVT::isVoid:return "MVT::isVoid";
54 case MVT::v2i8: return "MVT::v2i8";
55 case MVT::v4i8: return "MVT::v4i8";
56 case MVT::v8i8: return "MVT::v8i8";
57 case MVT::v16i8: return "MVT::v16i8";
58 case MVT::v32i8: return "MVT::v32i8";
59 case MVT::v2i16: return "MVT::v2i16";
60 case MVT::v4i16: return "MVT::v4i16";
61 case MVT::v8i16: return "MVT::v8i16";
62 case MVT::v16i16: return "MVT::v16i16";
63 case MVT::v2i32: return "MVT::v2i32";
64 case MVT::v4i32: return "MVT::v4i32";
65 case MVT::v8i32: return "MVT::v8i32";
66 case MVT::v1i64: return "MVT::v1i64";
67 case MVT::v2i64: return "MVT::v2i64";
68 case MVT::v4i64: return "MVT::v4i64";
69 case MVT::v2f32: return "MVT::v2f32";
70 case MVT::v4f32: return "MVT::v4f32";
71 case MVT::v8f32: return "MVT::v8f32";
72 case MVT::v2f64: return "MVT::v2f64";
73 case MVT::v4f64: return "MVT::v4f64";
74 case MVT::v3i32: return "MVT::v3i32";
75 case MVT::v3f32: return "MVT::v3f32";
76 case MVT::iPTR: return "TLI.getPointerTy()";
77 case MVT::iPTRAny: return "TLI.getPointerTy()";
78 default: assert(0 && "ILLEGAL VALUE TYPE!"); return "";
82 std::string llvm::getEnumName(MVT::SimpleValueType T) {
84 case MVT::Other: return "MVT::Other";
85 case MVT::i1: return "MVT::i1";
86 case MVT::i8: return "MVT::i8";
87 case MVT::i16: return "MVT::i16";
88 case MVT::i32: return "MVT::i32";
89 case MVT::i64: return "MVT::i64";
90 case MVT::i128: return "MVT::i128";
91 case MVT::iAny: return "MVT::iAny";
92 case MVT::fAny: return "MVT::fAny";
93 case MVT::f32: return "MVT::f32";
94 case MVT::f64: return "MVT::f64";
95 case MVT::f80: return "MVT::f80";
96 case MVT::f128: return "MVT::f128";
97 case MVT::ppcf128: return "MVT::ppcf128";
98 case MVT::Flag: return "MVT::Flag";
99 case MVT::isVoid:return "MVT::isVoid";
100 case MVT::v2i8: return "MVT::v2i8";
101 case MVT::v4i8: return "MVT::v4i8";
102 case MVT::v8i8: return "MVT::v8i8";
103 case MVT::v16i8: return "MVT::v16i8";
104 case MVT::v32i8: return "MVT::v32i8";
105 case MVT::v2i16: return "MVT::v2i16";
106 case MVT::v4i16: return "MVT::v4i16";
107 case MVT::v8i16: return "MVT::v8i16";
108 case MVT::v16i16: return "MVT::v16i16";
109 case MVT::v2i32: return "MVT::v2i32";
110 case MVT::v4i32: return "MVT::v4i32";
111 case MVT::v8i32: return "MVT::v8i32";
112 case MVT::v1i64: return "MVT::v1i64";
113 case MVT::v2i64: return "MVT::v2i64";
114 case MVT::v4i64: return "MVT::v4i64";
115 case MVT::v2f32: return "MVT::v2f32";
116 case MVT::v4f32: return "MVT::v4f32";
117 case MVT::v8f32: return "MVT::v8f32";
118 case MVT::v2f64: return "MVT::v2f64";
119 case MVT::v4f64: return "MVT::v4f64";
120 case MVT::v3i32: return "MVT::v3i32";
121 case MVT::v3f32: return "MVT::v3f32";
122 case MVT::iPTR: return "MVT::iPTR";
123 case MVT::iPTRAny: return "MVT::iPTRAny";
124 default: assert(0 && "ILLEGAL VALUE TYPE!"); return "";
128 /// getQualifiedName - Return the name of the specified record, with a
129 /// namespace qualifier if the record contains one.
131 std::string llvm::getQualifiedName(const Record *R) {
132 std::string Namespace = R->getValueAsString("Namespace");
133 if (Namespace.empty()) return R->getName();
134 return Namespace + "::" + R->getName();
140 /// getTarget - Return the current instance of the Target class.
142 CodeGenTarget::CodeGenTarget() {
143 std::vector<Record*> Targets = Records.getAllDerivedDefinitions("Target");
144 if (Targets.size() == 0)
145 throw std::string("ERROR: No 'Target' subclasses defined!");
146 if (Targets.size() != 1)
147 throw std::string("ERROR: Multiple subclasses of Target defined!");
148 TargetRec = Targets[0];
152 const std::string &CodeGenTarget::getName() const {
153 return TargetRec->getName();
156 std::string CodeGenTarget::getInstNamespace() const {
159 for (inst_iterator i = inst_begin(), e = inst_end(); i != e; ++i) {
160 InstNS = i->second.Namespace;
162 // Make sure not to pick up "TargetInstrInfo" by accidentally getting
163 // the namespace off the PHI instruction or something.
164 if (InstNS != "TargetInstrInfo")
171 Record *CodeGenTarget::getInstructionSet() const {
172 return TargetRec->getValueAsDef("InstructionSet");
175 /// getAsmWriter - Return the AssemblyWriter definition for this target.
177 Record *CodeGenTarget::getAsmWriter() const {
178 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyWriters");
179 if (AsmWriterNum >= LI.size())
180 throw "Target does not have an AsmWriter #" + utostr(AsmWriterNum) + "!";
181 return LI[AsmWriterNum];
184 void CodeGenTarget::ReadRegisters() const {
185 std::vector<Record*> Regs = Records.getAllDerivedDefinitions("Register");
187 throw std::string("No 'Register' subclasses defined!");
189 Registers.reserve(Regs.size());
190 Registers.assign(Regs.begin(), Regs.end());
193 CodeGenRegister::CodeGenRegister(Record *R) : TheDef(R) {
194 DeclaredSpillSize = R->getValueAsInt("SpillSize");
195 DeclaredSpillAlignment = R->getValueAsInt("SpillAlignment");
198 const std::string &CodeGenRegister::getName() const {
199 return TheDef->getName();
202 void CodeGenTarget::ReadRegisterClasses() const {
203 std::vector<Record*> RegClasses =
204 Records.getAllDerivedDefinitions("RegisterClass");
205 if (RegClasses.empty())
206 throw std::string("No 'RegisterClass' subclasses defined!");
208 RegisterClasses.reserve(RegClasses.size());
209 RegisterClasses.assign(RegClasses.begin(), RegClasses.end());
212 std::vector<unsigned char> CodeGenTarget::getRegisterVTs(Record *R) const {
213 std::vector<unsigned char> Result;
214 const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses();
215 for (unsigned i = 0, e = RCs.size(); i != e; ++i) {
216 const CodeGenRegisterClass &RC = RegisterClasses[i];
217 for (unsigned ei = 0, ee = RC.Elements.size(); ei != ee; ++ei) {
218 if (R == RC.Elements[ei]) {
219 const std::vector<MVT::SimpleValueType> &InVTs = RC.getValueTypes();
220 for (unsigned i = 0, e = InVTs.size(); i != e; ++i)
221 Result.push_back(InVTs[i]);
229 CodeGenRegisterClass::CodeGenRegisterClass(Record *R) : TheDef(R) {
230 // Rename anonymous register classes.
231 if (R->getName().size() > 9 && R->getName()[9] == '.') {
232 static unsigned AnonCounter = 0;
233 R->setName("AnonRegClass_"+utostr(AnonCounter++));
236 std::vector<Record*> TypeList = R->getValueAsListOfDefs("RegTypes");
237 for (unsigned i = 0, e = TypeList.size(); i != e; ++i) {
238 Record *Type = TypeList[i];
239 if (!Type->isSubClassOf("ValueType"))
240 throw "RegTypes list member '" + Type->getName() +
241 "' does not derive from the ValueType class!";
242 VTs.push_back(getValueType(Type));
244 assert(!VTs.empty() && "RegisterClass must contain at least one ValueType!");
246 std::vector<Record*> RegList = R->getValueAsListOfDefs("MemberList");
247 for (unsigned i = 0, e = RegList.size(); i != e; ++i) {
248 Record *Reg = RegList[i];
249 if (!Reg->isSubClassOf("Register"))
250 throw "Register Class member '" + Reg->getName() +
251 "' does not derive from the Register class!";
252 Elements.push_back(Reg);
255 std::vector<Record*> SubRegClassList =
256 R->getValueAsListOfDefs("SubRegClassList");
257 for (unsigned i = 0, e = SubRegClassList.size(); i != e; ++i) {
258 Record *SubRegClass = SubRegClassList[i];
259 if (!SubRegClass->isSubClassOf("RegisterClass"))
260 throw "Register Class member '" + SubRegClass->getName() +
261 "' does not derive from the RegisterClass class!";
262 SubRegClasses.push_back(SubRegClass);
265 // Allow targets to override the size in bits of the RegisterClass.
266 unsigned Size = R->getValueAsInt("Size");
268 Namespace = R->getValueAsString("Namespace");
269 SpillSize = Size ? Size : MVT(VTs[0]).getSizeInBits();
270 SpillAlignment = R->getValueAsInt("Alignment");
271 CopyCost = R->getValueAsInt("CopyCost");
272 MethodBodies = R->getValueAsCode("MethodBodies");
273 MethodProtos = R->getValueAsCode("MethodProtos");
276 const std::string &CodeGenRegisterClass::getName() const {
277 return TheDef->getName();
280 void CodeGenTarget::ReadLegalValueTypes() const {
281 const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses();
282 for (unsigned i = 0, e = RCs.size(); i != e; ++i)
283 for (unsigned ri = 0, re = RCs[i].VTs.size(); ri != re; ++ri)
284 LegalValueTypes.push_back(RCs[i].VTs[ri]);
286 // Remove duplicates.
287 std::sort(LegalValueTypes.begin(), LegalValueTypes.end());
288 LegalValueTypes.erase(std::unique(LegalValueTypes.begin(),
289 LegalValueTypes.end()),
290 LegalValueTypes.end());
294 void CodeGenTarget::ReadInstructions() const {
295 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
296 if (Insts.size() <= 2)
297 throw std::string("No 'Instruction' subclasses defined!");
299 // Parse the instructions defined in the .td file.
300 std::string InstFormatName =
301 getAsmWriter()->getValueAsString("InstFormatName");
303 for (unsigned i = 0, e = Insts.size(); i != e; ++i) {
304 std::string AsmStr = Insts[i]->getValueAsString(InstFormatName);
305 Instructions.insert(std::make_pair(Insts[i]->getName(),
306 CodeGenInstruction(Insts[i], AsmStr)));
310 /// getInstructionsByEnumValue - Return all of the instructions defined by the
311 /// target, ordered by their enum value.
313 getInstructionsByEnumValue(std::vector<const CodeGenInstruction*>
314 &NumberedInstructions) {
315 std::map<std::string, CodeGenInstruction>::const_iterator I;
316 I = getInstructions().find("PHI");
317 if (I == Instructions.end()) throw "Could not find 'PHI' instruction!";
318 const CodeGenInstruction *PHI = &I->second;
320 I = getInstructions().find("INLINEASM");
321 if (I == Instructions.end()) throw "Could not find 'INLINEASM' instruction!";
322 const CodeGenInstruction *INLINEASM = &I->second;
324 I = getInstructions().find("DBG_LABEL");
325 if (I == Instructions.end()) throw "Could not find 'DBG_LABEL' instruction!";
326 const CodeGenInstruction *DBG_LABEL = &I->second;
328 I = getInstructions().find("EH_LABEL");
329 if (I == Instructions.end()) throw "Could not find 'EH_LABEL' instruction!";
330 const CodeGenInstruction *EH_LABEL = &I->second;
332 I = getInstructions().find("GC_LABEL");
333 if (I == Instructions.end()) throw "Could not find 'GC_LABEL' instruction!";
334 const CodeGenInstruction *GC_LABEL = &I->second;
336 I = getInstructions().find("DECLARE");
337 if (I == Instructions.end()) throw "Could not find 'DECLARE' instruction!";
338 const CodeGenInstruction *DECLARE = &I->second;
340 I = getInstructions().find("EXTRACT_SUBREG");
341 if (I == Instructions.end())
342 throw "Could not find 'EXTRACT_SUBREG' instruction!";
343 const CodeGenInstruction *EXTRACT_SUBREG = &I->second;
345 I = getInstructions().find("INSERT_SUBREG");
346 if (I == Instructions.end())
347 throw "Could not find 'INSERT_SUBREG' instruction!";
348 const CodeGenInstruction *INSERT_SUBREG = &I->second;
350 I = getInstructions().find("IMPLICIT_DEF");
351 if (I == Instructions.end())
352 throw "Could not find 'IMPLICIT_DEF' instruction!";
353 const CodeGenInstruction *IMPLICIT_DEF = &I->second;
355 I = getInstructions().find("SUBREG_TO_REG");
356 if (I == Instructions.end())
357 throw "Could not find 'SUBREG_TO_REG' instruction!";
358 const CodeGenInstruction *SUBREG_TO_REG = &I->second;
360 I = getInstructions().find("COPY_TO_REGCLASS");
361 if (I == Instructions.end())
362 throw "Could not find 'COPY_TO_REGCLASS' instruction!";
363 const CodeGenInstruction *COPY_TO_REGCLASS = &I->second;
365 // Print out the rest of the instructions now.
366 NumberedInstructions.push_back(PHI);
367 NumberedInstructions.push_back(INLINEASM);
368 NumberedInstructions.push_back(DBG_LABEL);
369 NumberedInstructions.push_back(EH_LABEL);
370 NumberedInstructions.push_back(GC_LABEL);
371 NumberedInstructions.push_back(DECLARE);
372 NumberedInstructions.push_back(EXTRACT_SUBREG);
373 NumberedInstructions.push_back(INSERT_SUBREG);
374 NumberedInstructions.push_back(IMPLICIT_DEF);
375 NumberedInstructions.push_back(SUBREG_TO_REG);
376 NumberedInstructions.push_back(COPY_TO_REGCLASS);
377 for (inst_iterator II = inst_begin(), E = inst_end(); II != E; ++II)
378 if (&II->second != PHI &&
379 &II->second != INLINEASM &&
380 &II->second != DBG_LABEL &&
381 &II->second != EH_LABEL &&
382 &II->second != GC_LABEL &&
383 &II->second != DECLARE &&
384 &II->second != EXTRACT_SUBREG &&
385 &II->second != INSERT_SUBREG &&
386 &II->second != IMPLICIT_DEF &&
387 &II->second != SUBREG_TO_REG &&
388 &II->second != COPY_TO_REGCLASS)
389 NumberedInstructions.push_back(&II->second);
393 /// isLittleEndianEncoding - Return whether this target encodes its instruction
394 /// in little-endian format, i.e. bits laid out in the order [0..n]
396 bool CodeGenTarget::isLittleEndianEncoding() const {
397 return getInstructionSet()->getValueAsBit("isLittleEndianEncoding");
400 //===----------------------------------------------------------------------===//
401 // ComplexPattern implementation
403 ComplexPattern::ComplexPattern(Record *R) {
404 Ty = ::getValueType(R->getValueAsDef("Ty"));
405 NumOperands = R->getValueAsInt("NumOperands");
406 SelectFunc = R->getValueAsString("SelectFunc");
407 RootNodes = R->getValueAsListOfDefs("RootNodes");
409 // Parse the properties.
411 std::vector<Record*> PropList = R->getValueAsListOfDefs("Properties");
412 for (unsigned i = 0, e = PropList.size(); i != e; ++i)
413 if (PropList[i]->getName() == "SDNPHasChain") {
414 Properties |= 1 << SDNPHasChain;
415 } else if (PropList[i]->getName() == "SDNPOptInFlag") {
416 Properties |= 1 << SDNPOptInFlag;
417 } else if (PropList[i]->getName() == "SDNPMayStore") {
418 Properties |= 1 << SDNPMayStore;
419 } else if (PropList[i]->getName() == "SDNPMayLoad") {
420 Properties |= 1 << SDNPMayLoad;
421 } else if (PropList[i]->getName() == "SDNPSideEffect") {
422 Properties |= 1 << SDNPSideEffect;
423 } else if (PropList[i]->getName() == "SDNPMemOperand") {
424 Properties |= 1 << SDNPMemOperand;
426 cerr << "Unsupported SD Node property '" << PropList[i]->getName()
427 << "' on ComplexPattern '" << R->getName() << "'!\n";
431 // Parse the attributes.
433 PropList = R->getValueAsListOfDefs("Attributes");
434 for (unsigned i = 0, e = PropList.size(); i != e; ++i)
435 if (PropList[i]->getName() == "CPAttrParentAsRoot") {
436 Attributes |= 1 << CPAttrParentAsRoot;
438 cerr << "Unsupported pattern attribute '" << PropList[i]->getName()
439 << "' on ComplexPattern '" << R->getName() << "'!\n";
444 //===----------------------------------------------------------------------===//
445 // CodeGenIntrinsic Implementation
446 //===----------------------------------------------------------------------===//
448 std::vector<CodeGenIntrinsic> llvm::LoadIntrinsics(const RecordKeeper &RC,
450 std::vector<Record*> I = RC.getAllDerivedDefinitions("Intrinsic");
452 std::vector<CodeGenIntrinsic> Result;
454 for (unsigned i = 0, e = I.size(); i != e; ++i) {
455 bool isTarget = I[i]->getValueAsBit("isTarget");
456 if (isTarget == TargetOnly)
457 Result.push_back(CodeGenIntrinsic(I[i]));
462 CodeGenIntrinsic::CodeGenIntrinsic(Record *R) {
464 std::string DefName = R->getName();
466 isOverloaded = false;
467 isCommutative = false;
469 if (DefName.size() <= 4 ||
470 std::string(DefName.begin(), DefName.begin() + 4) != "int_")
471 throw "Intrinsic '" + DefName + "' does not start with 'int_'!";
473 EnumName = std::string(DefName.begin()+4, DefName.end());
475 if (R->getValue("GCCBuiltinName")) // Ignore a missing GCCBuiltinName field.
476 GCCBuiltinName = R->getValueAsString("GCCBuiltinName");
478 TargetPrefix = R->getValueAsString("TargetPrefix");
479 Name = R->getValueAsString("LLVMName");
482 // If an explicit name isn't specified, derive one from the DefName.
485 for (unsigned i = 0, e = EnumName.size(); i != e; ++i)
486 Name += (EnumName[i] == '_') ? '.' : EnumName[i];
488 // Verify it starts with "llvm.".
489 if (Name.size() <= 5 ||
490 std::string(Name.begin(), Name.begin() + 5) != "llvm.")
491 throw "Intrinsic '" + DefName + "'s name does not start with 'llvm.'!";
494 // If TargetPrefix is specified, make sure that Name starts with
495 // "llvm.<targetprefix>.".
496 if (!TargetPrefix.empty()) {
497 if (Name.size() < 6+TargetPrefix.size() ||
498 std::string(Name.begin() + 5, Name.begin() + 6 + TargetPrefix.size())
499 != (TargetPrefix + "."))
500 throw "Intrinsic '" + DefName + "' does not start with 'llvm." +
501 TargetPrefix + ".'!";
504 // Parse the list of return types.
505 std::vector<MVT::SimpleValueType> OverloadedVTs;
506 ListInit *TypeList = R->getValueAsListInit("RetTypes");
507 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) {
508 Record *TyEl = TypeList->getElementAsRecord(i);
509 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
510 MVT::SimpleValueType VT;
511 if (TyEl->isSubClassOf("LLVMMatchType")) {
512 unsigned MatchTy = TyEl->getValueAsInt("Number");
513 assert(MatchTy < OverloadedVTs.size() &&
514 "Invalid matching number!");
515 VT = OverloadedVTs[MatchTy];
516 // It only makes sense to use the extended and truncated vector element
517 // variants with iAny types; otherwise, if the intrinsic is not
518 // overloaded, all the types can be specified directly.
519 assert(((!TyEl->isSubClassOf("LLVMExtendedElementVectorType") &&
520 !TyEl->isSubClassOf("LLVMTruncatedElementVectorType")) ||
521 VT == MVT::iAny) && "Expected iAny type");
523 VT = getValueType(TyEl->getValueAsDef("VT"));
525 if (VT == MVT::iAny || VT == MVT::fAny || VT == MVT::iPTRAny) {
526 OverloadedVTs.push_back(VT);
527 isOverloaded |= true;
529 IS.RetVTs.push_back(VT);
530 IS.RetTypeDefs.push_back(TyEl);
533 if (IS.RetVTs.size() == 0)
534 throw "Intrinsic '"+DefName+"' needs at least a type for the ret value!";
536 // Parse the list of parameter types.
537 TypeList = R->getValueAsListInit("ParamTypes");
538 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) {
539 Record *TyEl = TypeList->getElementAsRecord(i);
540 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
541 MVT::SimpleValueType VT;
542 if (TyEl->isSubClassOf("LLVMMatchType")) {
543 unsigned MatchTy = TyEl->getValueAsInt("Number");
544 assert(MatchTy < OverloadedVTs.size() &&
545 "Invalid matching number!");
546 VT = OverloadedVTs[MatchTy];
547 // It only makes sense to use the extended and truncated vector element
548 // variants with iAny types; otherwise, if the intrinsic is not
549 // overloaded, all the types can be specified directly.
550 assert(((!TyEl->isSubClassOf("LLVMExtendedElementVectorType") &&
551 !TyEl->isSubClassOf("LLVMTruncatedElementVectorType")) ||
552 VT == MVT::iAny) && "Expected iAny type");
554 VT = getValueType(TyEl->getValueAsDef("VT"));
555 if (VT == MVT::iAny || VT == MVT::fAny || VT == MVT::iPTRAny) {
556 OverloadedVTs.push_back(VT);
557 isOverloaded |= true;
559 IS.ParamVTs.push_back(VT);
560 IS.ParamTypeDefs.push_back(TyEl);
563 // Parse the intrinsic properties.
564 ListInit *PropList = R->getValueAsListInit("Properties");
565 for (unsigned i = 0, e = PropList->getSize(); i != e; ++i) {
566 Record *Property = PropList->getElementAsRecord(i);
567 assert(Property->isSubClassOf("IntrinsicProperty") &&
568 "Expected a property!");
570 if (Property->getName() == "IntrNoMem")
572 else if (Property->getName() == "IntrReadArgMem")
574 else if (Property->getName() == "IntrReadMem")
576 else if (Property->getName() == "IntrWriteArgMem")
577 ModRef = WriteArgMem;
578 else if (Property->getName() == "IntrWriteMem")
580 else if (Property->getName() == "Commutative")
581 isCommutative = true;
582 else if (Property->isSubClassOf("NoCapture")) {
583 unsigned ArgNo = Property->getValueAsInt("ArgNo");
584 ArgumentAttributes.push_back(std::make_pair(ArgNo, NoCapture));
586 assert(0 && "Unknown property!");