1 //===- CodeGenTarget.h - Target Class Wrapper -------------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines wrappers for the Target class and related global
11 // functionality. This makes it easier to access the data and provides a single
12 // place that needs to check it for validity. All of these classes abort
13 // on error conditions.
15 //===----------------------------------------------------------------------===//
17 #ifndef CODEGEN_TARGET_H
18 #define CODEGEN_TARGET_H
20 #include "CodeGenInstruction.h"
21 #include "CodeGenRegisters.h"
22 #include "llvm/Support/raw_ostream.h"
23 #include "llvm/TableGen/Record.h"
28 struct CodeGenRegister;
29 class CodeGenSchedModels;
32 // SelectionDAG node properties.
33 // SDNPMemOperand: indicates that a node touches memory and therefore must
34 // have an associated memory operand that describes the access.
51 /// getValueType - Return the MVT::SimpleValueType that the specified TableGen
52 /// record corresponds to.
53 MVT::SimpleValueType getValueType(Record *Rec);
55 std::string getName(MVT::SimpleValueType T);
56 std::string getEnumName(MVT::SimpleValueType T);
58 /// getQualifiedName - Return the name of the specified record, with a
59 /// namespace qualifier if the record contains one.
60 std::string getQualifiedName(const Record *R);
62 /// CodeGenTarget - This class corresponds to the Target class in the .td files.
65 RecordKeeper &Records;
68 mutable DenseMap<const Record*, CodeGenInstruction*> Instructions;
69 mutable CodeGenRegBank *RegBank;
70 mutable std::vector<Record*> RegAltNameIndices;
71 mutable SmallVector<MVT::SimpleValueType, 8> LegalValueTypes;
72 void ReadRegAltNameIndices() const;
73 void ReadInstructions() const;
74 void ReadLegalValueTypes() const;
76 mutable CodeGenSchedModels *SchedModels;
78 mutable std::vector<const CodeGenInstruction*> InstrsByEnum;
80 CodeGenTarget(RecordKeeper &Records);
83 Record *getTargetRecord() const { return TargetRec; }
84 const std::string &getName() const;
86 /// getInstNamespace - Return the target-specific instruction namespace.
88 std::string getInstNamespace() const;
90 /// getInstructionSet - Return the InstructionSet object.
92 Record *getInstructionSet() const;
94 /// getAsmParser - Return the AssemblyParser definition for this target.
96 Record *getAsmParser() const;
98 /// getAsmParserVariant - Return the AssmblyParserVariant definition for
101 Record *getAsmParserVariant(unsigned i) const;
103 /// getAsmParserVariantCount - Return the AssmblyParserVariant definition
104 /// available for this target.
106 unsigned getAsmParserVariantCount() const;
108 /// getAsmWriter - Return the AssemblyWriter definition for this target.
110 Record *getAsmWriter() const;
112 /// getRegBank - Return the register bank description.
113 CodeGenRegBank &getRegBank() const;
115 /// getRegisterByName - If there is a register with the specific AsmName,
117 const CodeGenRegister *getRegisterByName(StringRef Name) const;
119 const std::vector<Record*> &getRegAltNameIndices() const {
120 if (RegAltNameIndices.empty()) ReadRegAltNameIndices();
121 return RegAltNameIndices;
124 const CodeGenRegisterClass &getRegisterClass(Record *R) const {
125 return *getRegBank().getRegClass(R);
128 /// getRegisterVTs - Find the union of all possible SimpleValueTypes for the
129 /// specified physical register.
130 std::vector<MVT::SimpleValueType> getRegisterVTs(Record *R) const;
132 ArrayRef<MVT::SimpleValueType> getLegalValueTypes() const {
133 if (LegalValueTypes.empty()) ReadLegalValueTypes();
134 return LegalValueTypes;
137 /// isLegalValueType - Return true if the specified value type is natively
138 /// supported by the target (i.e. there are registers that directly hold it).
139 bool isLegalValueType(MVT::SimpleValueType VT) const {
140 ArrayRef<MVT::SimpleValueType> LegalVTs = getLegalValueTypes();
141 for (unsigned i = 0, e = LegalVTs.size(); i != e; ++i)
142 if (LegalVTs[i] == VT) return true;
146 CodeGenSchedModels &getSchedModels() const;
149 DenseMap<const Record*, CodeGenInstruction*> &getInstructions() const {
150 if (Instructions.empty()) ReadInstructions();
155 CodeGenInstruction &getInstruction(const Record *InstRec) const {
156 if (Instructions.empty()) ReadInstructions();
157 DenseMap<const Record*, CodeGenInstruction*>::iterator I =
158 Instructions.find(InstRec);
159 assert(I != Instructions.end() && "Not an instruction");
163 /// getInstructionsByEnumValue - Return all of the instructions defined by the
164 /// target, ordered by their enum value.
165 const std::vector<const CodeGenInstruction*> &
166 getInstructionsByEnumValue() const {
167 if (InstrsByEnum.empty()) ComputeInstrsByEnum();
171 typedef std::vector<const CodeGenInstruction*>::const_iterator inst_iterator;
172 inst_iterator inst_begin() const{return getInstructionsByEnumValue().begin();}
173 inst_iterator inst_end() const { return getInstructionsByEnumValue().end(); }
176 /// isLittleEndianEncoding - are instruction bit patterns defined as [0..n]?
178 bool isLittleEndianEncoding() const;
180 /// guessInstructionProperties - should we just guess unset instruction
182 bool guessInstructionProperties() const;
185 void ComputeInstrsByEnum() const;
188 /// ComplexPattern - ComplexPattern info, corresponding to the ComplexPattern
189 /// tablegen class in TargetSelectionDAG.td
190 class ComplexPattern {
191 MVT::SimpleValueType Ty;
192 unsigned NumOperands;
193 std::string SelectFunc;
194 std::vector<Record*> RootNodes;
195 unsigned Properties; // Node properties
197 ComplexPattern() : NumOperands(0) {}
198 ComplexPattern(Record *R);
200 MVT::SimpleValueType getValueType() const { return Ty; }
201 unsigned getNumOperands() const { return NumOperands; }
202 const std::string &getSelectFunc() const { return SelectFunc; }
203 const std::vector<Record*> &getRootNodes() const {
206 bool hasProperty(enum SDNP Prop) const { return Properties & (1 << Prop); }
209 } // End llvm namespace