1 //===- CodeGenTarget.h - Target Class Wrapper -------------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines wrappers for the Target class and related global
11 // functionality. This makes it easier to access the data and provides a single
12 // place that needs to check it for validity. All of these classes throw
13 // exceptions on error conditions.
15 //===----------------------------------------------------------------------===//
17 #ifndef CODEGEN_TARGET_H
18 #define CODEGEN_TARGET_H
20 #include "CodeGenRegisters.h"
21 #include "CodeGenInstruction.h"
29 struct CodeGenRegister;
32 // SelectionDAG node properties.
45 /// getValueType - Return the MVT::ValueType that the specified TableGen record
47 MVT::ValueType getValueType(Record *Rec);
49 std::string getName(MVT::ValueType T);
50 std::string getEnumName(MVT::ValueType T);
52 /// getQualifiedName - Return the name of the specified record, with a
53 /// namespace qualifier if the record contains one.
54 std::string getQualifiedName(const Record *R);
56 /// CodeGenTarget - This class corresponds to the Target class in the .td files.
61 mutable std::map<std::string, CodeGenInstruction> Instructions;
62 mutable std::vector<CodeGenRegister> Registers;
63 mutable std::vector<CodeGenRegisterClass> RegisterClasses;
64 mutable std::vector<MVT::ValueType> LegalValueTypes;
65 void ReadRegisters() const;
66 void ReadRegisterClasses() const;
67 void ReadInstructions() const;
68 void ReadLegalValueTypes() const;
72 Record *getTargetRecord() const { return TargetRec; }
73 const std::string &getName() const;
75 /// getInstructionSet - Return the InstructionSet object.
77 Record *getInstructionSet() const;
79 /// getAsmWriter - Return the AssemblyWriter definition for this target.
81 Record *getAsmWriter() const;
83 const std::vector<CodeGenRegister> &getRegisters() const {
84 if (Registers.empty()) ReadRegisters();
88 const std::vector<CodeGenRegisterClass> &getRegisterClasses() const {
89 if (RegisterClasses.empty()) ReadRegisterClasses();
90 return RegisterClasses;
93 const CodeGenRegisterClass &getRegisterClass(Record *R) const {
94 const std::vector<CodeGenRegisterClass> &RC = getRegisterClasses();
95 for (unsigned i = 0, e = RC.size(); i != e; ++i)
96 if (RC[i].TheDef == R)
98 assert(0 && "Didn't find the register class");
102 /// getRegisterClassForRegister - Find the register class that contains the
103 /// specified physical register. If there register exists in multiple
104 /// register classes or is not in a register class, return null.
105 const CodeGenRegisterClass *getRegisterClassForRegister(Record *R) const {
106 const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses();
107 const CodeGenRegisterClass *FoundRC = 0;
108 for (unsigned i = 0, e = RCs.size(); i != e; ++i) {
109 const CodeGenRegisterClass &RC = RegisterClasses[i];
110 for (unsigned ei = 0, ee = RC.Elements.size(); ei != ee; ++ei) {
111 if (R == RC.Elements[ei]) {
112 if (FoundRC) return 0; // In multiple RC's
121 /// getRegisterVTs - Find the union of all possible ValueTypes for the
122 /// specified physical register.
123 std::vector<unsigned char> getRegisterVTs(Record *R) const;
125 const std::vector<MVT::ValueType> &getLegalValueTypes() const {
126 if (LegalValueTypes.empty()) ReadLegalValueTypes();
127 return LegalValueTypes;
130 /// isLegalValueType - Return true if the specified value type is natively
131 /// supported by the target (i.e. there are registers that directly hold it).
132 bool isLegalValueType(MVT::ValueType VT) const {
133 const std::vector<MVT::ValueType> &LegalVTs = getLegalValueTypes();
134 for (unsigned i = 0, e = LegalVTs.size(); i != e; ++i)
135 if (LegalVTs[i] == VT) return true;
139 /// getInstructions - Return all of the instructions defined for this target.
141 const std::map<std::string, CodeGenInstruction> &getInstructions() const {
142 if (Instructions.empty()) ReadInstructions();
146 CodeGenInstruction &getInstruction(const std::string &Name) const {
147 const std::map<std::string, CodeGenInstruction> &Insts = getInstructions();
148 assert(Insts.count(Name) && "Not an instruction!");
149 return const_cast<CodeGenInstruction&>(Insts.find(Name)->second);
152 typedef std::map<std::string,
153 CodeGenInstruction>::const_iterator inst_iterator;
154 inst_iterator inst_begin() const { return getInstructions().begin(); }
155 inst_iterator inst_end() const { return Instructions.end(); }
157 /// getInstructionsByEnumValue - Return all of the instructions defined by the
158 /// target, ordered by their enum value.
159 void getInstructionsByEnumValue(std::vector<const CodeGenInstruction*>
160 &NumberedInstructions);
163 /// isLittleEndianEncoding - are instruction bit patterns defined as [0..n]?
165 bool isLittleEndianEncoding() const;
168 /// ComplexPattern - ComplexPattern info, corresponding to the ComplexPattern
169 /// tablegen class in TargetSelectionDAG.td
170 class ComplexPattern {
172 unsigned NumOperands;
173 std::string SelectFunc;
174 std::vector<Record*> RootNodes;
177 ComplexPattern() : NumOperands(0) {};
178 ComplexPattern(Record *R);
180 MVT::ValueType getValueType() const { return Ty; }
181 unsigned getNumOperands() const { return NumOperands; }
182 const std::string &getSelectFunc() const { return SelectFunc; }
183 const std::vector<Record*> &getRootNodes() const {
186 bool hasProperty(enum SDNP Prop) const { return Properties & (1 << Prop); }
190 } // End llvm namespace