1 //===- FastISelEmitter.cpp - Generate an instruction selector -------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This tablegen backend emits a "fast" instruction selector.
12 // This instruction selection method is designed to emit very poor code
13 // quickly. Also, it is not designed to do much lowering, so most illegal
14 // types (e.g. i64 on 32-bit targets) and operations (e.g. calls) are not
15 // supported and cannot easily be added. Blocks containing operations
16 // that are not supported need to be handled by a more capable selector,
17 // such as the SelectionDAG selector.
19 // The intended use for "fast" instruction selection is "-O0" mode
20 // compilation, where the quality of the generated code is irrelevant when
21 // weighed against the speed at which the code can be generated.
23 // If compile time is so important, you might wonder why we don't just
24 // skip codegen all-together, emit LLVM bytecode files, and execute them
25 // with an interpreter. The answer is that it would complicate linking and
26 // debugging, and also because that isn't how a compiler is expected to
27 // work in some circles.
29 // If you need better generated code or more lowering than what this
30 // instruction selector provides, use the SelectionDAG (DAGISel) instruction
31 // selector instead. If you're looking here because SelectionDAG isn't fast
32 // enough, consider looking into improving the SelectionDAG infastructure
33 // instead. At the time of this writing there remain several major
34 // opportunities for improvement.
36 //===----------------------------------------------------------------------===//
38 #include "FastISelEmitter.h"
40 #include "llvm/Support/Debug.h"
41 #include "llvm/Support/Streams.h"
42 #include "llvm/ADT/VectorExtras.h"
47 /// OperandsSignature - This class holds a description of a list of operand
48 /// types. It has utility methods for emitting text based on the operands.
50 struct OperandsSignature {
51 std::vector<std::string> Operands;
53 bool operator<(const OperandsSignature &O) const {
54 return Operands < O.Operands;
57 bool empty() const { return Operands.empty(); }
59 /// initialize - Examine the given pattern and initialize the contents
60 /// of the Operands array accordingly. Return true if all the operands
61 /// are supported, false otherwise.
63 bool initialize(TreePatternNode *InstPatNode,
64 const CodeGenTarget &Target,
65 MVT::SimpleValueType VT) {
66 if (!InstPatNode->isLeaf() &&
67 InstPatNode->getOperator()->getName() == "imm") {
68 Operands.push_back("i");
71 if (!InstPatNode->isLeaf() &&
72 InstPatNode->getOperator()->getName() == "fpimm") {
73 Operands.push_back("f");
77 const CodeGenRegisterClass *DstRC = 0;
79 for (unsigned i = 0, e = InstPatNode->getNumChildren(); i != e; ++i) {
80 TreePatternNode *Op = InstPatNode->getChild(i);
81 // For now, filter out any operand with a predicate.
82 if (!Op->getPredicateFn().empty())
84 // For now, filter out any operand with multiple values.
85 if (Op->getExtTypes().size() != 1)
87 // For now, all the operands must have the same type.
88 if (Op->getTypeNum(0) != VT)
91 if (Op->getOperator()->getName() == "imm") {
92 Operands.push_back("i");
95 if (Op->getOperator()->getName() == "fpimm") {
96 Operands.push_back("f");
99 // For now, ignore other non-leaf nodes.
102 DefInit *OpDI = dynamic_cast<DefInit*>(Op->getLeafValue());
105 Record *OpLeafRec = OpDI->getDef();
106 // TODO: handle instructions which have physreg operands.
107 if (OpLeafRec->isSubClassOf("Register"))
109 // For now, the only other thing we accept is register operands.
110 if (!OpLeafRec->isSubClassOf("RegisterClass"))
112 // For now, require the register operands' register classes to all
114 const CodeGenRegisterClass *RC = &Target.getRegisterClass(OpLeafRec);
117 // For now, all the operands must have the same register class.
123 Operands.push_back("r");
128 void PrintParameters(std::ostream &OS) const {
129 for (unsigned i = 0, e = Operands.size(); i != e; ++i) {
130 if (Operands[i] == "r") {
131 OS << "unsigned Op" << i;
132 } else if (Operands[i] == "i") {
133 OS << "uint64_t imm" << i;
134 } else if (Operands[i] == "f") {
135 OS << "ConstantFP *f" << i;
137 assert("Unknown operand kind!");
145 void PrintArguments(std::ostream &OS) const {
146 for (unsigned i = 0, e = Operands.size(); i != e; ++i) {
147 if (Operands[i] == "r") {
149 } else if (Operands[i] == "i") {
151 } else if (Operands[i] == "f") {
154 assert("Unknown operand kind!");
162 void PrintManglingSuffix(std::ostream &OS) const {
163 for (unsigned i = 0, e = Operands.size(); i != e; ++i) {
169 /// InstructionMemo - This class holds additional information about an
170 /// instruction needed to emit code for it.
172 struct InstructionMemo {
174 const CodeGenRegisterClass *RC;
178 typedef std::map<std::string, InstructionMemo> PredMap;
179 typedef std::map<MVT::SimpleValueType, PredMap> RetPredMap;
180 typedef std::map<MVT::SimpleValueType, RetPredMap> TypeRetPredMap;
181 typedef std::map<std::string, TypeRetPredMap> OpcodeTypeRetPredMap;
182 typedef std::map<OperandsSignature, OpcodeTypeRetPredMap> OperandsOpcodeTypeRetPredMap;
184 OperandsOpcodeTypeRetPredMap SimplePatterns;
189 explicit FastISelMap(std::string InstNS);
191 void CollectPatterns(CodeGenDAGPatterns &CGP);
192 void PrintClass(std::ostream &OS);
193 void PrintFunctionDefinitions(std::ostream &OS);
198 static std::string getOpcodeName(Record *Op, CodeGenDAGPatterns &CGP) {
199 return CGP.getSDNodeInfo(Op).getEnumName();
202 static std::string getLegalCName(std::string OpName) {
203 std::string::size_type pos = OpName.find("::");
204 if (pos != std::string::npos)
205 OpName.replace(pos, 2, "_");
209 FastISelMap::FastISelMap(std::string instns)
213 void FastISelMap::CollectPatterns(CodeGenDAGPatterns &CGP) {
214 const CodeGenTarget &Target = CGP.getTargetInfo();
216 // Determine the target's namespace name.
217 InstNS = Target.getInstNamespace() + "::";
218 assert(InstNS.size() > 2 && "Can't determine target-specific namespace!");
220 // Scan through all the patterns and record the simple ones.
221 for (CodeGenDAGPatterns::ptm_iterator I = CGP.ptm_begin(),
222 E = CGP.ptm_end(); I != E; ++I) {
223 const PatternToMatch &Pattern = *I;
225 // For now, just look at Instructions, so that we don't have to worry
226 // about emitting multiple instructions for a pattern.
227 TreePatternNode *Dst = Pattern.getDstPattern();
228 if (Dst->isLeaf()) continue;
229 Record *Op = Dst->getOperator();
230 if (!Op->isSubClassOf("Instruction"))
232 CodeGenInstruction &II = CGP.getTargetInfo().getInstruction(Op->getName());
233 if (II.OperandList.empty())
236 // For now, ignore instructions where the first operand is not an
238 Record *Op0Rec = II.OperandList[0].Rec;
239 if (!Op0Rec->isSubClassOf("RegisterClass"))
241 const CodeGenRegisterClass *DstRC = &Target.getRegisterClass(Op0Rec);
245 // Inspect the pattern.
246 TreePatternNode *InstPatNode = Pattern.getSrcPattern();
247 if (!InstPatNode) continue;
248 if (InstPatNode->isLeaf()) continue;
250 Record *InstPatOp = InstPatNode->getOperator();
251 std::string OpcodeName = getOpcodeName(InstPatOp, CGP);
252 MVT::SimpleValueType RetVT = InstPatNode->getTypeNum(0);
253 MVT::SimpleValueType VT = RetVT;
254 if (InstPatNode->getNumChildren())
255 VT = InstPatNode->getChild(0)->getTypeNum(0);
257 // For now, filter out instructions which just set a register to
258 // an Operand or an immediate, like MOV32ri.
259 if (InstPatOp->isSubClassOf("Operand"))
262 // For now, filter out any instructions with predicates.
263 if (!InstPatNode->getPredicateFn().empty())
266 // Check all the operands.
267 OperandsSignature Operands;
268 if (!Operands.initialize(InstPatNode, Target, VT))
271 // Get the predicate that guards this pattern.
272 std::string PredicateCheck = Pattern.getPredicateCheck();
274 // Ok, we found a pattern that we can handle. Remember it.
275 InstructionMemo Memo = {
276 Pattern.getDstPattern()->getOperator()->getName(),
279 assert(!SimplePatterns[Operands][OpcodeName][VT][RetVT].count(PredicateCheck) &&
280 "Duplicate pattern!");
281 SimplePatterns[Operands][OpcodeName][VT][RetVT][PredicateCheck] = Memo;
285 void FastISelMap::PrintClass(std::ostream &OS) {
286 // Declare the target FastISel class.
287 OS << "class FastISel : public llvm::FastISel {\n";
288 for (OperandsOpcodeTypeRetPredMap::const_iterator OI = SimplePatterns.begin(),
289 OE = SimplePatterns.end(); OI != OE; ++OI) {
290 const OperandsSignature &Operands = OI->first;
291 const OpcodeTypeRetPredMap &OTM = OI->second;
293 for (OpcodeTypeRetPredMap::const_iterator I = OTM.begin(), E = OTM.end();
295 const std::string &Opcode = I->first;
296 const TypeRetPredMap &TM = I->second;
298 for (TypeRetPredMap::const_iterator TI = TM.begin(), TE = TM.end();
300 MVT::SimpleValueType VT = TI->first;
301 const RetPredMap &RM = TI->second;
304 for (RetPredMap::const_iterator RI = RM.begin(), RE = RM.end();
306 MVT::SimpleValueType RetVT = RI->first;
307 OS << " unsigned FastEmit_" << getLegalCName(Opcode)
308 << "_" << getLegalCName(getName(VT)) << "_"
309 << getLegalCName(getName(RetVT)) << "_";
310 Operands.PrintManglingSuffix(OS);
312 Operands.PrintParameters(OS);
316 OS << " unsigned FastEmit_" << getLegalCName(Opcode)
317 << "_" << getLegalCName(getName(VT)) << "_";
318 Operands.PrintManglingSuffix(OS);
319 OS << "(MVT::SimpleValueType RetVT";
320 if (!Operands.empty())
322 Operands.PrintParameters(OS);
326 OS << " unsigned FastEmit_" << getLegalCName(Opcode) << "_";
327 Operands.PrintManglingSuffix(OS);
328 OS << "(MVT::SimpleValueType VT, MVT::SimpleValueType RetVT";
329 if (!Operands.empty())
331 Operands.PrintParameters(OS);
335 OS << " unsigned FastEmit_";
336 Operands.PrintManglingSuffix(OS);
337 OS << "(MVT::SimpleValueType VT, MVT::SimpleValueType RetVT, ISD::NodeType Opcode";
338 if (!Operands.empty())
340 Operands.PrintParameters(OS);
345 // Declare the Subtarget member, which is used for predicate checks.
346 OS << " const " << InstNS.substr(0, InstNS.size() - 2)
347 << "Subtarget *Subtarget;\n";
350 // Declare the constructor.
352 OS << " explicit FastISel(MachineFunction &mf)\n";
353 OS << " : llvm::FastISel(mf),\n";
354 OS << " Subtarget(&TM.getSubtarget<" << InstNS.substr(0, InstNS.size() - 2)
355 << "Subtarget>()) {}\n";
360 void FastISelMap::PrintFunctionDefinitions(std::ostream &OS) {
361 // Now emit code for all the patterns that we collected.
362 for (OperandsOpcodeTypeRetPredMap::const_iterator OI = SimplePatterns.begin(),
363 OE = SimplePatterns.end(); OI != OE; ++OI) {
364 const OperandsSignature &Operands = OI->first;
365 const OpcodeTypeRetPredMap &OTM = OI->second;
367 for (OpcodeTypeRetPredMap::const_iterator I = OTM.begin(), E = OTM.end();
369 const std::string &Opcode = I->first;
370 const TypeRetPredMap &TM = I->second;
372 OS << "// FastEmit functions for " << Opcode << ".\n";
375 // Emit one function for each opcode,type pair.
376 for (TypeRetPredMap::const_iterator TI = TM.begin(), TE = TM.end();
378 MVT::SimpleValueType VT = TI->first;
379 const RetPredMap &RM = TI->second;
380 if (RM.size() != 1) {
381 for (RetPredMap::const_iterator RI = RM.begin(), RE = RM.end();
383 MVT::SimpleValueType RetVT = RI->first;
384 const PredMap &PM = RI->second;
385 bool HasPred = false;
387 OS << "unsigned FastISel::FastEmit_"
388 << getLegalCName(Opcode)
389 << "_" << getLegalCName(getName(VT))
390 << "_" << getLegalCName(getName(RetVT)) << "_";
391 Operands.PrintManglingSuffix(OS);
393 Operands.PrintParameters(OS);
396 // Emit code for each possible instruction. There may be
397 // multiple if there are subtarget concerns.
398 for (PredMap::const_iterator PI = PM.begin(), PE = PM.end();
400 std::string PredicateCheck = PI->first;
401 const InstructionMemo &Memo = PI->second;
403 if (PredicateCheck.empty()) {
405 "Multiple instructions match, at least one has "
406 "a predicate and at least one doesn't!");
408 OS << " if (" + PredicateCheck + ")\n";
412 OS << " return FastEmitInst_";
413 Operands.PrintManglingSuffix(OS);
414 OS << "(" << InstNS << Memo.Name << ", ";
415 OS << InstNS << Memo.RC->getName() << "RegisterClass";
416 if (!Operands.empty())
418 Operands.PrintArguments(OS);
421 // Return 0 if none of the predicates were satisfied.
423 OS << " return 0;\n";
428 // Emit one function for the type that demultiplexes on return type.
429 OS << "unsigned FastISel::FastEmit_"
430 << getLegalCName(Opcode) << "_"
431 << getLegalCName(getName(VT)) << "_";
432 Operands.PrintManglingSuffix(OS);
433 OS << "(MVT::SimpleValueType RetVT";
434 if (!Operands.empty())
436 Operands.PrintParameters(OS);
437 OS << ") {\nswitch (RetVT) {\n";
438 for (RetPredMap::const_iterator RI = RM.begin(), RE = RM.end();
440 MVT::SimpleValueType RetVT = RI->first;
441 OS << " case " << getName(RetVT) << ": return FastEmit_"
442 << getLegalCName(Opcode) << "_" << getLegalCName(getName(VT))
443 << "_" << getLegalCName(getName(RetVT)) << "_";
444 Operands.PrintManglingSuffix(OS);
446 Operands.PrintArguments(OS);
449 OS << " default: return 0;\n}\n}\n\n";
452 // Non-variadic return type.
453 OS << "unsigned FastISel::FastEmit_"
454 << getLegalCName(Opcode) << "_"
455 << getLegalCName(getName(VT)) << "_";
456 Operands.PrintManglingSuffix(OS);
457 OS << "(MVT::SimpleValueType RetVT";
458 if (!Operands.empty())
460 Operands.PrintParameters(OS);
463 OS << " if (RetVT != " << getName(RM.begin()->first)
464 << ")\n return 0;\n";
466 const PredMap &PM = RM.begin()->second;
467 bool HasPred = false;
469 // Emit code for each possible instruction. There may be
470 // multiple if there are subtarget concerns.
471 for (PredMap::const_iterator PI = PM.begin(), PE = PM.end(); PI != PE; ++PI) {
472 std::string PredicateCheck = PI->first;
473 const InstructionMemo &Memo = PI->second;
475 if (PredicateCheck.empty()) {
477 "Multiple instructions match, at least one has "
478 "a predicate and at least one doesn't!");
480 OS << " if (" + PredicateCheck + ")\n";
484 OS << " return FastEmitInst_";
485 Operands.PrintManglingSuffix(OS);
486 OS << "(" << InstNS << Memo.Name << ", ";
487 OS << InstNS << Memo.RC->getName() << "RegisterClass";
488 if (!Operands.empty())
490 Operands.PrintArguments(OS);
494 // Return 0 if none of the predicates were satisfied.
496 OS << " return 0;\n";
502 // Emit one function for the opcode that demultiplexes based on the type.
503 OS << "unsigned FastISel::FastEmit_"
504 << getLegalCName(Opcode) << "_";
505 Operands.PrintManglingSuffix(OS);
506 OS << "(MVT::SimpleValueType VT, MVT::SimpleValueType RetVT";
507 if (!Operands.empty())
509 Operands.PrintParameters(OS);
511 OS << " switch (VT) {\n";
512 for (TypeRetPredMap::const_iterator TI = TM.begin(), TE = TM.end();
514 MVT::SimpleValueType VT = TI->first;
515 std::string TypeName = getName(VT);
516 OS << " case " << TypeName << ": return FastEmit_"
517 << getLegalCName(Opcode) << "_" << getLegalCName(TypeName) << "_";
518 Operands.PrintManglingSuffix(OS);
520 if (!Operands.empty())
522 Operands.PrintArguments(OS);
525 OS << " default: return 0;\n";
531 OS << "// Top-level FastEmit function.\n";
534 // Emit one function for the operand signature that demultiplexes based
535 // on opcode and type.
536 OS << "unsigned FastISel::FastEmit_";
537 Operands.PrintManglingSuffix(OS);
538 OS << "(MVT::SimpleValueType VT, MVT::SimpleValueType RetVT, ISD::NodeType Opcode";
539 if (!Operands.empty())
541 Operands.PrintParameters(OS);
543 OS << " switch (Opcode) {\n";
544 for (OpcodeTypeRetPredMap::const_iterator I = OTM.begin(), E = OTM.end();
546 const std::string &Opcode = I->first;
548 OS << " case " << Opcode << ": return FastEmit_"
549 << getLegalCName(Opcode) << "_";
550 Operands.PrintManglingSuffix(OS);
552 if (!Operands.empty())
554 Operands.PrintArguments(OS);
557 OS << " default: return 0;\n";
564 void FastISelEmitter::run(std::ostream &OS) {
565 const CodeGenTarget &Target = CGP.getTargetInfo();
567 // Determine the target's namespace name.
568 std::string InstNS = Target.getInstNamespace() + "::";
569 assert(InstNS.size() > 2 && "Can't determine target-specific namespace!");
571 EmitSourceFileHeader("\"Fast\" Instruction Selector for the " +
572 Target.getName() + " target", OS);
574 OS << "#include \"llvm/CodeGen/FastISel.h\"\n";
576 OS << "namespace llvm {\n";
578 OS << "namespace " << InstNS.substr(0, InstNS.size() - 2) << " {\n";
581 FastISelMap F(InstNS);
582 F.CollectPatterns(CGP);
584 F.PrintFunctionDefinitions(OS);
586 // Define the target FastISel creation function.
587 OS << "llvm::FastISel *createFastISel(MachineFunction &mf) {\n";
588 OS << " return new FastISel(mf);\n";
592 OS << "} // namespace X86\n";
594 OS << "} // namespace llvm\n";
597 FastISelEmitter::FastISelEmitter(RecordKeeper &R)