1 //===- FastISelEmitter.cpp - Generate an instruction selector -------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This tablegen backend emits a "fast" instruction selector.
12 // This instruction selection method is designed to emit very poor code
13 // quickly. Also, it is not designed to do much lowering, so most illegal
14 // types (e.g. i64 on 32-bit targets) and operations (e.g. calls) are not
15 // supported and cannot easily be added. Blocks containing operations
16 // that are not supported need to be handled by a more capable selector,
17 // such as the SelectionDAG selector.
19 // The intended use for "fast" instruction selection is "-O0" mode
20 // compilation, where the quality of the generated code is irrelevant when
21 // weighed against the speed at which the code can be generated.
23 // If compile time is so important, you might wonder why we don't just
24 // skip codegen all-together, emit LLVM bytecode files, and execute them
25 // with an interpreter. The answer is that it would complicate linking and
26 // debugging, and also because that isn't how a compiler is expected to
27 // work in some circles.
29 // If you need better generated code or more lowering than what this
30 // instruction selector provides, use the SelectionDAG (DAGISel) instruction
31 // selector instead. If you're looking here because SelectionDAG isn't fast
32 // enough, consider looking into improving the SelectionDAG infastructure
33 // instead. At the time of this writing there remain several major
34 // opportunities for improvement.
36 //===----------------------------------------------------------------------===//
38 #include "FastISelEmitter.h"
40 #include "llvm/Support/Debug.h"
41 #include "llvm/Support/Streams.h"
42 #include "llvm/ADT/VectorExtras.h"
47 /// OperandsSignature - This class holds a description of a list of operand
48 /// types. It has utility methods for emitting text based on the operands.
50 struct OperandsSignature {
51 std::vector<std::string> Operands;
53 bool operator<(const OperandsSignature &O) const {
54 return Operands < O.Operands;
57 bool empty() const { return Operands.empty(); }
59 void PrintParameters(std::ostream &OS) const {
60 for (unsigned i = 0, e = Operands.size(); i != e; ++i) {
61 if (Operands[i] == "r") {
62 OS << "unsigned Op" << i;
64 assert("Unknown operand kind!");
72 void PrintArguments(std::ostream &OS) const {
73 for (unsigned i = 0, e = Operands.size(); i != e; ++i) {
74 if (Operands[i] == "r") {
77 assert("Unknown operand kind!");
85 void PrintManglingSuffix(std::ostream &OS) const {
86 for (unsigned i = 0, e = Operands.size(); i != e; ++i) {
92 /// InstructionMemo - This class holds additional information about an
93 /// instruction needed to emit code for it.
95 struct InstructionMemo {
97 const CodeGenRegisterClass *RC;
102 static std::string getOpcodeName(Record *Op, CodeGenDAGPatterns &CGP) {
103 return CGP.getSDNodeInfo(Op).getEnumName();
106 static std::string getLegalCName(std::string OpName) {
107 std::string::size_type pos = OpName.find("::");
108 if (pos != std::string::npos)
109 OpName.replace(pos, 2, "_");
113 void FastISelEmitter::run(std::ostream &OS) {
114 EmitSourceFileHeader("\"Fast\" Instruction Selector for the " +
115 CGP.getTargetInfo().getName() + " target", OS);
117 const CodeGenTarget &Target = CGP.getTargetInfo();
119 // Get the namespace to insert instructions into. Make sure not to pick up
120 // "TargetInstrInfo" by accidentally getting the namespace off the PHI
121 // instruction or something.
123 for (CodeGenTarget::inst_iterator i = Target.inst_begin(),
124 e = Target.inst_end(); i != e; ++i) {
125 InstNS = i->second.Namespace;
126 if (InstNS != "TargetInstrInfo")
130 OS << "namespace llvm {\n";
131 OS << "namespace " << InstNS << " {\n";
132 OS << "class FastISel;\n";
137 if (!InstNS.empty()) InstNS += "::";
139 typedef std::map<MVT::SimpleValueType, InstructionMemo> TypeMap;
140 typedef std::map<std::string, TypeMap> OpcodeTypeMap;
141 typedef std::map<OperandsSignature, OpcodeTypeMap> OperandsOpcodeTypeMap;
142 OperandsOpcodeTypeMap SimplePatterns;
144 // Create the supported type signatures.
145 OperandsSignature KnownOperands;
146 SimplePatterns[KnownOperands] = OpcodeTypeMap();
147 KnownOperands.Operands.push_back("r");
148 SimplePatterns[KnownOperands] = OpcodeTypeMap();
149 KnownOperands.Operands.push_back("r");
150 SimplePatterns[KnownOperands] = OpcodeTypeMap();
152 for (CodeGenDAGPatterns::ptm_iterator I = CGP.ptm_begin(),
153 E = CGP.ptm_end(); I != E; ++I) {
154 const PatternToMatch &Pattern = *I;
156 // For now, just look at Instructions, so that we don't have to worry
157 // about emitting multiple instructions for a pattern.
158 TreePatternNode *Dst = Pattern.getDstPattern();
159 if (Dst->isLeaf()) continue;
160 Record *Op = Dst->getOperator();
161 if (!Op->isSubClassOf("Instruction"))
163 CodeGenInstruction &II = CGP.getTargetInfo().getInstruction(Op->getName());
164 if (II.OperandList.empty())
166 Record *Op0Rec = II.OperandList[0].Rec;
167 if (!Op0Rec->isSubClassOf("RegisterClass"))
169 const CodeGenRegisterClass *DstRC = &Target.getRegisterClass(Op0Rec);
173 // Inspect the pattern.
174 TreePatternNode *InstPatNode = Pattern.getSrcPattern();
175 if (!InstPatNode) continue;
176 if (InstPatNode->isLeaf()) continue;
178 Record *InstPatOp = InstPatNode->getOperator();
179 std::string OpcodeName = getOpcodeName(InstPatOp, CGP);
180 MVT::SimpleValueType VT = InstPatNode->getTypeNum(0);
182 // For now, filter out instructions which just set a register to
183 // an Operand or an immediate, like MOV32ri.
184 if (InstPatOp->isSubClassOf("Operand"))
186 if (InstPatOp->getName() == "imm" ||
187 InstPatOp->getName() == "fpimm")
190 // For now, filter out any instructions with predicates.
191 if (!InstPatNode->getPredicateFn().empty())
194 // Check all the operands. For now only accept register operands.
195 OperandsSignature Operands;
196 for (unsigned i = 0, e = InstPatNode->getNumChildren(); i != e; ++i) {
197 TreePatternNode *Op = InstPatNode->getChild(i);
200 // For now, filter out any operand with a predicate.
201 if (!Op->getPredicateFn().empty())
203 DefInit *OpDI = dynamic_cast<DefInit*>(Op->getLeafValue());
206 Record *OpLeafRec = OpDI->getDef();
207 if (!OpLeafRec->isSubClassOf("RegisterClass"))
209 const CodeGenRegisterClass *RC = &Target.getRegisterClass(OpLeafRec);
212 if (Op->getTypeNum(0) != VT)
214 Operands.Operands.push_back("r");
217 // If it's not a known signature, ignore it.
218 if (!SimplePatterns.count(Operands))
221 // Ok, we found a pattern that we can handle. Remember it.
223 InstructionMemo Memo = {
224 Pattern.getDstPattern()->getOperator()->getName(),
227 SimplePatterns[Operands][OpcodeName][VT] = Memo;
233 OS << "#include \"llvm/CodeGen/FastISel.h\"\n";
235 OS << "namespace llvm {\n";
238 // Declare the target FastISel class.
239 OS << "class " << InstNS << "FastISel : public llvm::FastISel {\n";
240 for (OperandsOpcodeTypeMap::const_iterator OI = SimplePatterns.begin(),
241 OE = SimplePatterns.end(); OI != OE; ++OI) {
242 const OperandsSignature &Operands = OI->first;
243 const OpcodeTypeMap &OTM = OI->second;
245 for (OpcodeTypeMap::const_iterator I = OTM.begin(), E = OTM.end();
247 const std::string &Opcode = I->first;
248 const TypeMap &TM = I->second;
250 for (TypeMap::const_iterator TI = TM.begin(), TE = TM.end();
252 MVT::SimpleValueType VT = TI->first;
254 OS << " unsigned FastEmit_" << getLegalCName(Opcode)
255 << "_" << getLegalCName(getName(VT)) << "(";
256 Operands.PrintParameters(OS);
260 OS << " unsigned FastEmit_" << getLegalCName(Opcode)
261 << "(MVT::SimpleValueType VT";
262 if (!Operands.empty())
264 Operands.PrintParameters(OS);
268 OS << " unsigned FastEmit_";
269 Operands.PrintManglingSuffix(OS);
270 OS << "(MVT::SimpleValueType VT, ISD::NodeType Opcode";
271 if (!Operands.empty())
273 Operands.PrintParameters(OS);
277 OS << " FastISel(MachineBasicBlock *mbb, MachineFunction *mf, ";
278 OS << "const TargetInstrInfo *tii) : llvm::FastISel(mbb, mf, tii) {}\n";
282 // Define the target FastISel creation function.
283 OS << "llvm::FastISel *" << InstNS
284 << "createFastISel(MachineBasicBlock *mbb, MachineFunction *mf, ";
285 OS << "const TargetInstrInfo *tii) {\n";
286 OS << " return new " << InstNS << "FastISel(mbb, mf, tii);\n";
290 // Now emit code for all the patterns that we collected.
291 for (OperandsOpcodeTypeMap::const_iterator OI = SimplePatterns.begin(),
292 OE = SimplePatterns.end(); OI != OE; ++OI) {
293 const OperandsSignature &Operands = OI->first;
294 const OpcodeTypeMap &OTM = OI->second;
296 for (OpcodeTypeMap::const_iterator I = OTM.begin(), E = OTM.end();
298 const std::string &Opcode = I->first;
299 const TypeMap &TM = I->second;
301 OS << "// FastEmit functions for " << Opcode << ".\n";
304 // Emit one function for each opcode,type pair.
305 for (TypeMap::const_iterator TI = TM.begin(), TE = TM.end();
307 MVT::SimpleValueType VT = TI->first;
308 const InstructionMemo &Memo = TI->second;
310 OS << "unsigned " << InstNS << "FastISel::FastEmit_"
311 << getLegalCName(Opcode)
312 << "_" << getLegalCName(getName(VT)) << "(";
313 Operands.PrintParameters(OS);
315 OS << " return FastEmitInst_";
316 Operands.PrintManglingSuffix(OS);
317 OS << "(" << InstNS << Memo.Name << ", ";
318 OS << InstNS << Memo.RC->getName() << "RegisterClass";
319 if (!Operands.empty())
321 Operands.PrintArguments(OS);
327 // Emit one function for the opcode that demultiplexes based on the type.
328 OS << "unsigned " << InstNS << "FastISel::FastEmit_"
329 << getLegalCName(Opcode) << "(MVT::SimpleValueType VT";
330 if (!Operands.empty())
332 Operands.PrintParameters(OS);
334 OS << " switch (VT) {\n";
335 for (TypeMap::const_iterator TI = TM.begin(), TE = TM.end();
337 MVT::SimpleValueType VT = TI->first;
338 std::string TypeName = getName(VT);
339 OS << " case " << TypeName << ": return FastEmit_"
340 << getLegalCName(Opcode) << "_" << getLegalCName(TypeName) << "(";
341 Operands.PrintArguments(OS);
344 OS << " default: return 0;\n";
350 // Emit one function for the operand signature that demultiplexes based
351 // on opcode and type.
352 OS << "unsigned " << InstNS << "FastISel::FastEmit_";
353 Operands.PrintManglingSuffix(OS);
354 OS << "(MVT::SimpleValueType VT, ISD::NodeType Opcode";
355 if (!Operands.empty())
357 Operands.PrintParameters(OS);
359 OS << " switch (Opcode) {\n";
360 for (OpcodeTypeMap::const_iterator I = OTM.begin(), E = OTM.end();
362 const std::string &Opcode = I->first;
364 OS << " case " << Opcode << ": return FastEmit_"
365 << getLegalCName(Opcode) << "(VT";
366 if (!Operands.empty())
368 Operands.PrintArguments(OS);
371 OS << " default: return 0;\n";
380 // todo: really filter out Constants