1 //===------------ FixedLenDecoderEmitter.cpp - Decoder Generator ----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // It contains the tablegen backend that emits the decoder functions for
11 // targets with fixed length instruction set.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "decoder-emitter"
17 #include "FixedLenDecoderEmitter.h"
18 #include "CodeGenTarget.h"
19 #include "llvm/TableGen/Record.h"
20 #include "llvm/ADT/APInt.h"
21 #include "llvm/ADT/StringExtras.h"
22 #include "llvm/Support/Debug.h"
23 #include "llvm/Support/raw_ostream.h"
31 // The set (BIT_TRUE, BIT_FALSE, BIT_UNSET) represents a ternary logic system
34 // BIT_UNFILTERED is used as the init value for a filter position. It is used
35 // only for filter processings.
40 BIT_UNFILTERED // unfiltered
43 static bool ValueSet(bit_value_t V) {
44 return (V == BIT_TRUE || V == BIT_FALSE);
46 static bool ValueNotSet(bit_value_t V) {
47 return (V == BIT_UNSET);
49 static int Value(bit_value_t V) {
50 return ValueNotSet(V) ? -1 : (V == BIT_FALSE ? 0 : 1);
52 static bit_value_t bitFromBits(const BitsInit &bits, unsigned index) {
53 if (BitInit *bit = dynamic_cast<BitInit*>(bits.getBit(index)))
54 return bit->getValue() ? BIT_TRUE : BIT_FALSE;
56 // The bit is uninitialized.
59 // Prints the bit value for each position.
60 static void dumpBits(raw_ostream &o, const BitsInit &bits) {
63 for (index = bits.getNumBits(); index > 0; index--) {
64 switch (bitFromBits(bits, index - 1)) {
75 llvm_unreachable("unexpected return value from bitFromBits");
80 static BitsInit &getBitsField(const Record &def, const char *str) {
81 BitsInit *bits = def.getValueAsBitsInit(str);
85 // Forward declaration.
88 // Representation of the instruction to work on.
89 typedef std::vector<bit_value_t> insn_t;
91 /// Filter - Filter works with FilterChooser to produce the decoding tree for
94 /// It is useful to think of a Filter as governing the switch stmts of the
95 /// decoding tree in a certain level. Each case stmt delegates to an inferior
96 /// FilterChooser to decide what further decoding logic to employ, or in another
97 /// words, what other remaining bits to look at. The FilterChooser eventually
98 /// chooses a best Filter to do its job.
100 /// This recursive scheme ends when the number of Opcodes assigned to the
101 /// FilterChooser becomes 1 or if there is a conflict. A conflict happens when
102 /// the Filter/FilterChooser combo does not know how to distinguish among the
103 /// Opcodes assigned.
105 /// An example of a conflict is
108 /// 111101000.00........00010000....
109 /// 111101000.00........0001........
110 /// 1111010...00........0001........
111 /// 1111010...00....................
112 /// 1111010.........................
113 /// 1111............................
114 /// ................................
115 /// VST4q8a 111101000_00________00010000____
116 /// VST4q8b 111101000_00________00010000____
118 /// The Debug output shows the path that the decoding tree follows to reach the
119 /// the conclusion that there is a conflict. VST4q8a is a vst4 to double-spaced
120 /// even registers, while VST4q8b is a vst4 to double-spaced odd regsisters.
122 /// The encoding info in the .td files does not specify this meta information,
123 /// which could have been used by the decoder to resolve the conflict. The
124 /// decoder could try to decode the even/odd register numbering and assign to
125 /// VST4q8a or VST4q8b, but for the time being, the decoder chooses the "a"
126 /// version and return the Opcode since the two have the same Asm format string.
129 const FilterChooser *Owner;// points to the FilterChooser who owns this filter
130 unsigned StartBit; // the starting bit position
131 unsigned NumBits; // number of bits to filter
132 bool Mixed; // a mixed region contains both set and unset bits
134 // Map of well-known segment value to the set of uid's with that value.
135 std::map<uint64_t, std::vector<unsigned> > FilteredInstructions;
137 // Set of uid's with non-constant segment values.
138 std::vector<unsigned> VariableInstructions;
140 // Map of well-known segment value to its delegate.
141 std::map<unsigned, const FilterChooser*> FilterChooserMap;
143 // Number of instructions which fall under FilteredInstructions category.
144 unsigned NumFiltered;
146 // Keeps track of the last opcode in the filtered bucket.
147 unsigned LastOpcFiltered;
150 unsigned getNumFiltered() const { return NumFiltered; }
151 unsigned getSingletonOpc() const {
152 assert(NumFiltered == 1);
153 return LastOpcFiltered;
155 // Return the filter chooser for the group of instructions without constant
157 const FilterChooser &getVariableFC() const {
158 assert(NumFiltered == 1);
159 assert(FilterChooserMap.size() == 1);
160 return *(FilterChooserMap.find((unsigned)-1)->second);
163 Filter(const Filter &f);
164 Filter(FilterChooser &owner, unsigned startBit, unsigned numBits, bool mixed);
168 // Divides the decoding task into sub tasks and delegates them to the
169 // inferior FilterChooser's.
171 // A special case arises when there's only one entry in the filtered
172 // instructions. In order to unambiguously decode the singleton, we need to
173 // match the remaining undecoded encoding bits against the singleton.
176 // Emit code to decode instructions given a segment or segments of bits.
177 void emit(raw_ostream &o, unsigned &Indentation) const;
179 // Returns the number of fanout produced by the filter. More fanout implies
180 // the filter distinguishes more categories of instructions.
181 unsigned usefulness() const;
182 }; // End of class Filter
184 // These are states of our finite state machines used in FilterChooser's
185 // filterProcessor() which produces the filter candidates to use.
194 /// FilterChooser - FilterChooser chooses the best filter among a set of Filters
195 /// in order to perform the decoding of instructions at the current level.
197 /// Decoding proceeds from the top down. Based on the well-known encoding bits
198 /// of instructions available, FilterChooser builds up the possible Filters that
199 /// can further the task of decoding by distinguishing among the remaining
200 /// candidate instructions.
202 /// Once a filter has been chosen, it is called upon to divide the decoding task
203 /// into sub-tasks and delegates them to its inferior FilterChoosers for further
206 /// It is useful to think of a Filter as governing the switch stmts of the
207 /// decoding tree. And each case is delegated to an inferior FilterChooser to
208 /// decide what further remaining bits to look at.
209 class FilterChooser {
213 // Vector of codegen instructions to choose our filter.
214 const std::vector<const CodeGenInstruction*> &AllInstructions;
216 // Vector of uid's for this filter chooser to work on.
217 const std::vector<unsigned> &Opcodes;
219 // Lookup table for the operand decoding of instructions.
220 const std::map<unsigned, std::vector<OperandInfo> > &Operands;
222 // Vector of candidate filters.
223 std::vector<Filter> Filters;
225 // Array of bit values passed down from our parent.
226 // Set to all BIT_UNFILTERED's for Parent == NULL.
227 std::vector<bit_value_t> FilterBitValues;
229 // Links to the FilterChooser above us in the decoding tree.
230 const FilterChooser *Parent;
232 // Index of the best filter from Filters.
235 // Width of instructions
239 const FixedLenDecoderEmitter *Emitter;
242 FilterChooser(const FilterChooser &FC)
243 : AllInstructions(FC.AllInstructions), Opcodes(FC.Opcodes),
244 Operands(FC.Operands), Filters(FC.Filters),
245 FilterBitValues(FC.FilterBitValues), Parent(FC.Parent),
246 BestIndex(FC.BestIndex), BitWidth(FC.BitWidth),
247 Emitter(FC.Emitter) { }
249 FilterChooser(const std::vector<const CodeGenInstruction*> &Insts,
250 const std::vector<unsigned> &IDs,
251 const std::map<unsigned, std::vector<OperandInfo> > &Ops,
253 const FixedLenDecoderEmitter *E)
254 : AllInstructions(Insts), Opcodes(IDs), Operands(Ops), Filters(),
255 Parent(NULL), BestIndex(-1), BitWidth(BW), Emitter(E) {
256 for (unsigned i = 0; i < BitWidth; ++i)
257 FilterBitValues.push_back(BIT_UNFILTERED);
262 FilterChooser(const std::vector<const CodeGenInstruction*> &Insts,
263 const std::vector<unsigned> &IDs,
264 const std::map<unsigned, std::vector<OperandInfo> > &Ops,
265 const std::vector<bit_value_t> &ParentFilterBitValues,
266 const FilterChooser &parent)
267 : AllInstructions(Insts), Opcodes(IDs), Operands(Ops),
268 Filters(), FilterBitValues(ParentFilterBitValues),
269 Parent(&parent), BestIndex(-1), BitWidth(parent.BitWidth),
270 Emitter(parent.Emitter) {
274 // The top level filter chooser has NULL as its parent.
275 bool isTopLevel() const { return Parent == NULL; }
277 // Emit the top level typedef and decodeInstruction() function.
278 void emitTop(raw_ostream &o, unsigned Indentation,
279 const std::string &Namespace) const;
282 // Populates the insn given the uid.
283 void insnWithID(insn_t &Insn, unsigned Opcode) const {
284 BitsInit &Bits = getBitsField(*AllInstructions[Opcode]->TheDef, "Inst");
286 // We may have a SoftFail bitmask, which specifies a mask where an encoding
287 // may differ from the value in "Inst" and yet still be valid, but the
288 // disassembler should return SoftFail instead of Success.
290 // This is used for marking UNPREDICTABLE instructions in the ARM world.
292 AllInstructions[Opcode]->TheDef->getValueAsBitsInit("SoftFail");
294 for (unsigned i = 0; i < BitWidth; ++i) {
295 if (SFBits && bitFromBits(*SFBits, i) == BIT_TRUE)
296 Insn.push_back(BIT_UNSET);
298 Insn.push_back(bitFromBits(Bits, i));
302 // Returns the record name.
303 const std::string &nameWithID(unsigned Opcode) const {
304 return AllInstructions[Opcode]->TheDef->getName();
307 // Populates the field of the insn given the start position and the number of
308 // consecutive bits to scan for.
310 // Returns false if there exists any uninitialized bit value in the range.
311 // Returns true, otherwise.
312 bool fieldFromInsn(uint64_t &Field, insn_t &Insn, unsigned StartBit,
313 unsigned NumBits) const;
315 /// dumpFilterArray - dumpFilterArray prints out debugging info for the given
316 /// filter array as a series of chars.
317 void dumpFilterArray(raw_ostream &o,
318 const std::vector<bit_value_t> & filter) const;
320 /// dumpStack - dumpStack traverses the filter chooser chain and calls
321 /// dumpFilterArray on each filter chooser up to the top level one.
322 void dumpStack(raw_ostream &o, const char *prefix) const;
324 Filter &bestFilter() {
325 assert(BestIndex != -1 && "BestIndex not set");
326 return Filters[BestIndex];
329 // Called from Filter::recurse() when singleton exists. For debug purpose.
330 void SingletonExists(unsigned Opc) const;
332 bool PositionFiltered(unsigned i) const {
333 return ValueSet(FilterBitValues[i]);
336 // Calculates the island(s) needed to decode the instruction.
337 // This returns a lit of undecoded bits of an instructions, for example,
338 // Inst{20} = 1 && Inst{3-0} == 0b1111 represents two islands of yet-to-be
339 // decoded bits in order to verify that the instruction matches the Opcode.
340 unsigned getIslands(std::vector<unsigned> &StartBits,
341 std::vector<unsigned> &EndBits,
342 std::vector<uint64_t> &FieldVals,
343 const insn_t &Insn) const;
345 // Emits code to check the Predicates member of an instruction are true.
346 // Returns true if predicate matches were emitted, false otherwise.
347 bool emitPredicateMatch(raw_ostream &o, unsigned &Indentation,
350 void emitSoftFailCheck(raw_ostream &o, unsigned Indentation,
353 // Emits code to decode the singleton. Return true if we have matched all the
355 bool emitSingletonDecoder(raw_ostream &o, unsigned &Indentation,
358 // Emits code to decode the singleton, and then to decode the rest.
359 void emitSingletonDecoder(raw_ostream &o, unsigned &Indentation,
360 const Filter &Best) const;
362 void emitBinaryParser(raw_ostream &o , unsigned &Indentation,
363 const OperandInfo &OpInfo) const;
365 // Assign a single filter and run with it.
366 void runSingleFilter(unsigned startBit, unsigned numBit, bool mixed);
368 // reportRegion is a helper function for filterProcessor to mark a region as
369 // eligible for use as a filter region.
370 void reportRegion(bitAttr_t RA, unsigned StartBit, unsigned BitIndex,
373 // FilterProcessor scans the well-known encoding bits of the instructions and
374 // builds up a list of candidate filters. It chooses the best filter and
375 // recursively descends down the decoding tree.
376 bool filterProcessor(bool AllowMixed, bool Greedy = true);
378 // Decides on the best configuration of filter(s) to use in order to decode
379 // the instructions. A conflict of instructions may occur, in which case we
380 // dump the conflict set to the standard error.
383 // Emits code to decode our share of instructions. Returns true if the
384 // emitted code causes a return, which occurs if we know how to decode
385 // the instruction at this level or the instruction is not decodeable.
386 bool emit(raw_ostream &o, unsigned &Indentation) const;
389 ///////////////////////////
391 // Filter Implementation //
393 ///////////////////////////
395 Filter::Filter(const Filter &f)
396 : Owner(f.Owner), StartBit(f.StartBit), NumBits(f.NumBits), Mixed(f.Mixed),
397 FilteredInstructions(f.FilteredInstructions),
398 VariableInstructions(f.VariableInstructions),
399 FilterChooserMap(f.FilterChooserMap), NumFiltered(f.NumFiltered),
400 LastOpcFiltered(f.LastOpcFiltered) {
403 Filter::Filter(FilterChooser &owner, unsigned startBit, unsigned numBits,
405 : Owner(&owner), StartBit(startBit), NumBits(numBits), Mixed(mixed) {
406 assert(StartBit + NumBits - 1 < Owner->BitWidth);
411 for (unsigned i = 0, e = Owner->Opcodes.size(); i != e; ++i) {
414 // Populates the insn given the uid.
415 Owner->insnWithID(Insn, Owner->Opcodes[i]);
418 // Scans the segment for possibly well-specified encoding bits.
419 bool ok = Owner->fieldFromInsn(Field, Insn, StartBit, NumBits);
422 // The encoding bits are well-known. Lets add the uid of the
423 // instruction into the bucket keyed off the constant field value.
424 LastOpcFiltered = Owner->Opcodes[i];
425 FilteredInstructions[Field].push_back(LastOpcFiltered);
428 // Some of the encoding bit(s) are unspecified. This contributes to
429 // one additional member of "Variable" instructions.
430 VariableInstructions.push_back(Owner->Opcodes[i]);
434 assert((FilteredInstructions.size() + VariableInstructions.size() > 0)
435 && "Filter returns no instruction categories");
439 std::map<unsigned, const FilterChooser*>::iterator filterIterator;
440 for (filterIterator = FilterChooserMap.begin();
441 filterIterator != FilterChooserMap.end();
443 delete filterIterator->second;
447 // Divides the decoding task into sub tasks and delegates them to the
448 // inferior FilterChooser's.
450 // A special case arises when there's only one entry in the filtered
451 // instructions. In order to unambiguously decode the singleton, we need to
452 // match the remaining undecoded encoding bits against the singleton.
453 void Filter::recurse() {
454 std::map<uint64_t, std::vector<unsigned> >::const_iterator mapIterator;
456 // Starts by inheriting our parent filter chooser's filter bit values.
457 std::vector<bit_value_t> BitValueArray(Owner->FilterBitValues);
461 if (VariableInstructions.size()) {
462 // Conservatively marks each segment position as BIT_UNSET.
463 for (bitIndex = 0; bitIndex < NumBits; bitIndex++)
464 BitValueArray[StartBit + bitIndex] = BIT_UNSET;
466 // Delegates to an inferior filter chooser for further processing on this
467 // group of instructions whose segment values are variable.
468 FilterChooserMap.insert(std::pair<unsigned, const FilterChooser*>(
470 new FilterChooser(Owner->AllInstructions,
471 VariableInstructions,
478 // No need to recurse for a singleton filtered instruction.
479 // See also Filter::emit().
480 if (getNumFiltered() == 1) {
481 //Owner->SingletonExists(LastOpcFiltered);
482 assert(FilterChooserMap.size() == 1);
486 // Otherwise, create sub choosers.
487 for (mapIterator = FilteredInstructions.begin();
488 mapIterator != FilteredInstructions.end();
491 // Marks all the segment positions with either BIT_TRUE or BIT_FALSE.
492 for (bitIndex = 0; bitIndex < NumBits; bitIndex++) {
493 if (mapIterator->first & (1ULL << bitIndex))
494 BitValueArray[StartBit + bitIndex] = BIT_TRUE;
496 BitValueArray[StartBit + bitIndex] = BIT_FALSE;
499 // Delegates to an inferior filter chooser for further processing on this
500 // category of instructions.
501 FilterChooserMap.insert(std::pair<unsigned, const FilterChooser*>(
503 new FilterChooser(Owner->AllInstructions,
512 // Emit code to decode instructions given a segment or segments of bits.
513 void Filter::emit(raw_ostream &o, unsigned &Indentation) const {
514 o.indent(Indentation) << "// Check Inst{";
517 o << (StartBit + NumBits - 1) << '-';
519 o << StartBit << "} ...\n";
521 o.indent(Indentation) << "switch (fieldFromInstruction" << Owner->BitWidth
522 << "(insn, " << StartBit << ", "
523 << NumBits << ")) {\n";
525 std::map<unsigned, const FilterChooser*>::const_iterator filterIterator;
527 bool DefaultCase = false;
528 for (filterIterator = FilterChooserMap.begin();
529 filterIterator != FilterChooserMap.end();
532 // Field value -1 implies a non-empty set of variable instructions.
533 // See also recurse().
534 if (filterIterator->first == (unsigned)-1) {
537 o.indent(Indentation) << "default:\n";
538 o.indent(Indentation) << " break; // fallthrough\n";
540 // Closing curly brace for the switch statement.
541 // This is unconventional because we want the default processing to be
542 // performed for the fallthrough cases as well, i.e., when the "cases"
543 // did not prove a decoded instruction.
544 o.indent(Indentation) << "}\n";
547 o.indent(Indentation) << "case " << filterIterator->first << ":\n";
549 // We arrive at a category of instructions with the same segment value.
550 // Now delegate to the sub filter chooser for further decodings.
551 // The case may fallthrough, which happens if the remaining well-known
552 // encoding bits do not match exactly.
553 if (!DefaultCase) { ++Indentation; ++Indentation; }
555 bool finished = filterIterator->second->emit(o, Indentation);
556 // For top level default case, there's no need for a break statement.
557 if (Owner->isTopLevel() && DefaultCase)
560 o.indent(Indentation) << "break;\n";
562 if (!DefaultCase) { --Indentation; --Indentation; }
565 // If there is no default case, we still need to supply a closing brace.
567 // Closing curly brace for the switch statement.
568 o.indent(Indentation) << "}\n";
572 // Returns the number of fanout produced by the filter. More fanout implies
573 // the filter distinguishes more categories of instructions.
574 unsigned Filter::usefulness() const {
575 if (VariableInstructions.size())
576 return FilteredInstructions.size();
578 return FilteredInstructions.size() + 1;
581 //////////////////////////////////
583 // Filterchooser Implementation //
585 //////////////////////////////////
587 // Emit the top level typedef and decodeInstruction() function.
588 void FilterChooser::emitTop(raw_ostream &o, unsigned Indentation,
589 const std::string &Namespace) const {
590 o.indent(Indentation) <<
591 "static MCDisassembler::DecodeStatus decode" << Namespace << "Instruction"
592 << BitWidth << "(MCInst &MI, uint" << BitWidth
593 << "_t insn, uint64_t Address, "
594 << "const void *Decoder, const MCSubtargetInfo &STI) {\n";
595 o.indent(Indentation) << " unsigned tmp = 0;\n";
596 o.indent(Indentation) << " (void)tmp;\n";
597 o.indent(Indentation) << Emitter->Locals << "\n";
598 o.indent(Indentation) << " uint64_t Bits = STI.getFeatureBits();\n";
599 o.indent(Indentation) << " (void)Bits;\n";
601 ++Indentation; ++Indentation;
602 // Emits code to decode the instructions.
603 emit(o, Indentation);
606 o.indent(Indentation) << "return " << Emitter->ReturnFail << ";\n";
607 --Indentation; --Indentation;
609 o.indent(Indentation) << "}\n";
614 // Populates the field of the insn given the start position and the number of
615 // consecutive bits to scan for.
617 // Returns false if and on the first uninitialized bit value encountered.
618 // Returns true, otherwise.
619 bool FilterChooser::fieldFromInsn(uint64_t &Field, insn_t &Insn,
620 unsigned StartBit, unsigned NumBits) const {
623 for (unsigned i = 0; i < NumBits; ++i) {
624 if (Insn[StartBit + i] == BIT_UNSET)
627 if (Insn[StartBit + i] == BIT_TRUE)
628 Field = Field | (1ULL << i);
634 /// dumpFilterArray - dumpFilterArray prints out debugging info for the given
635 /// filter array as a series of chars.
636 void FilterChooser::dumpFilterArray(raw_ostream &o,
637 const std::vector<bit_value_t> &filter) const {
640 for (bitIndex = BitWidth; bitIndex > 0; bitIndex--) {
641 switch (filter[bitIndex - 1]) {
658 /// dumpStack - dumpStack traverses the filter chooser chain and calls
659 /// dumpFilterArray on each filter chooser up to the top level one.
660 void FilterChooser::dumpStack(raw_ostream &o, const char *prefix) const {
661 const FilterChooser *current = this;
665 dumpFilterArray(o, current->FilterBitValues);
667 current = current->Parent;
671 // Called from Filter::recurse() when singleton exists. For debug purpose.
672 void FilterChooser::SingletonExists(unsigned Opc) const {
674 insnWithID(Insn0, Opc);
676 errs() << "Singleton exists: " << nameWithID(Opc)
677 << " with its decoding dominating ";
678 for (unsigned i = 0; i < Opcodes.size(); ++i) {
679 if (Opcodes[i] == Opc) continue;
680 errs() << nameWithID(Opcodes[i]) << ' ';
684 dumpStack(errs(), "\t\t");
685 for (unsigned i = 0; i < Opcodes.size(); ++i) {
686 const std::string &Name = nameWithID(Opcodes[i]);
688 errs() << '\t' << Name << " ";
690 getBitsField(*AllInstructions[Opcodes[i]]->TheDef, "Inst"));
695 // Calculates the island(s) needed to decode the instruction.
696 // This returns a list of undecoded bits of an instructions, for example,
697 // Inst{20} = 1 && Inst{3-0} == 0b1111 represents two islands of yet-to-be
698 // decoded bits in order to verify that the instruction matches the Opcode.
699 unsigned FilterChooser::getIslands(std::vector<unsigned> &StartBits,
700 std::vector<unsigned> &EndBits,
701 std::vector<uint64_t> &FieldVals,
702 const insn_t &Insn) const {
706 uint64_t FieldVal = 0;
709 // 1: Water (the bit value does not affect decoding)
710 // 2: Island (well-known bit value needed for decoding)
714 for (unsigned i = 0; i < BitWidth; ++i) {
715 Val = Value(Insn[i]);
716 bool Filtered = PositionFiltered(i);
718 default: llvm_unreachable("Unreachable code!");
721 if (Filtered || Val == -1)
722 State = 1; // Still in Water
724 State = 2; // Into the Island
726 StartBits.push_back(i);
731 if (Filtered || Val == -1) {
732 State = 1; // Into the Water
733 EndBits.push_back(i - 1);
734 FieldVals.push_back(FieldVal);
737 State = 2; // Still in Island
739 FieldVal = FieldVal | Val << BitNo;
744 // If we are still in Island after the loop, do some housekeeping.
746 EndBits.push_back(BitWidth - 1);
747 FieldVals.push_back(FieldVal);
751 assert(StartBits.size() == Num && EndBits.size() == Num &&
752 FieldVals.size() == Num);
756 void FilterChooser::emitBinaryParser(raw_ostream &o, unsigned &Indentation,
757 const OperandInfo &OpInfo) const {
758 const std::string &Decoder = OpInfo.Decoder;
760 if (OpInfo.numFields() == 1) {
761 OperandInfo::const_iterator OI = OpInfo.begin();
762 o.indent(Indentation) << " tmp = fieldFromInstruction" << BitWidth
763 << "(insn, " << OI->Base << ", " << OI->Width
766 o.indent(Indentation) << " tmp = 0;\n";
767 for (OperandInfo::const_iterator OI = OpInfo.begin(), OE = OpInfo.end();
769 o.indent(Indentation) << " tmp |= (fieldFromInstruction" << BitWidth
770 << "(insn, " << OI->Base << ", " << OI->Width
771 << ") << " << OI->Offset << ");\n";
776 o.indent(Indentation) << " " << Emitter->GuardPrefix << Decoder
777 << "(MI, tmp, Address, Decoder)"
778 << Emitter->GuardPostfix << "\n";
780 o.indent(Indentation) << " MI.addOperand(MCOperand::CreateImm(tmp));\n";
784 static void emitSinglePredicateMatch(raw_ostream &o, StringRef str,
785 const std::string &PredicateNamespace) {
787 o << "!(Bits & " << PredicateNamespace << "::"
788 << str.slice(1,str.size()) << ")";
790 o << "(Bits & " << PredicateNamespace << "::" << str << ")";
793 bool FilterChooser::emitPredicateMatch(raw_ostream &o, unsigned &Indentation,
794 unsigned Opc) const {
795 ListInit *Predicates =
796 AllInstructions[Opc]->TheDef->getValueAsListInit("Predicates");
797 for (unsigned i = 0; i < Predicates->getSize(); ++i) {
798 Record *Pred = Predicates->getElementAsRecord(i);
799 if (!Pred->getValue("AssemblerMatcherPredicate"))
802 std::string P = Pred->getValueAsString("AssemblerCondString");
811 std::pair<StringRef, StringRef> pairs = SR.split(',');
812 while (pairs.second.size()) {
813 emitSinglePredicateMatch(o, pairs.first, Emitter->PredicateNamespace);
815 pairs = pairs.second.split(',');
817 emitSinglePredicateMatch(o, pairs.first, Emitter->PredicateNamespace);
819 return Predicates->getSize() > 0;
822 void FilterChooser::emitSoftFailCheck(raw_ostream &o, unsigned Indentation,
823 unsigned Opc) const {
825 AllInstructions[Opc]->TheDef->getValueAsBitsInit("SoftFail");
827 BitsInit *InstBits = AllInstructions[Opc]->TheDef->getValueAsBitsInit("Inst");
829 APInt PositiveMask(BitWidth, 0ULL);
830 APInt NegativeMask(BitWidth, 0ULL);
831 for (unsigned i = 0; i < BitWidth; ++i) {
832 bit_value_t B = bitFromBits(*SFBits, i);
833 bit_value_t IB = bitFromBits(*InstBits, i);
835 if (B != BIT_TRUE) continue;
839 // The bit is meant to be false, so emit a check to see if it is true.
840 PositiveMask.setBit(i);
843 // The bit is meant to be true, so emit a check to see if it is false.
844 NegativeMask.setBit(i);
847 // The bit is not set; this must be an error!
848 StringRef Name = AllInstructions[Opc]->TheDef->getName();
849 errs() << "SoftFail Conflict: bit SoftFail{" << i << "} in "
851 << " is set but Inst{" << i <<"} is unset!\n"
852 << " - You can only mark a bit as SoftFail if it is fully defined"
853 << " (1/0 - not '?') in Inst\n";
854 o << "#error SoftFail Conflict, " << Name << "::SoftFail{" << i
855 << "} set but Inst{" << i << "} undefined!\n";
859 bool NeedPositiveMask = PositiveMask.getBoolValue();
860 bool NeedNegativeMask = NegativeMask.getBoolValue();
862 if (!NeedPositiveMask && !NeedNegativeMask)
865 std::string PositiveMaskStr = PositiveMask.toString(16, /*signed=*/false);
866 std::string NegativeMaskStr = NegativeMask.toString(16, /*signed=*/false);
867 StringRef BitExt = "";
871 o.indent(Indentation) << "if (";
872 if (NeedPositiveMask)
873 o << "insn & 0x" << PositiveMaskStr << BitExt;
874 if (NeedPositiveMask && NeedNegativeMask)
876 if (NeedNegativeMask)
877 o << "~insn & 0x" << NegativeMaskStr << BitExt;
879 o.indent(Indentation+2) << "S = MCDisassembler::SoftFail;\n";
882 // Emits code to decode the singleton. Return true if we have matched all the
884 bool FilterChooser::emitSingletonDecoder(raw_ostream &o, unsigned &Indentation,
885 unsigned Opc) const {
886 std::vector<unsigned> StartBits;
887 std::vector<unsigned> EndBits;
888 std::vector<uint64_t> FieldVals;
890 insnWithID(Insn, Opc);
892 // Look for islands of undecoded bits of the singleton.
893 getIslands(StartBits, EndBits, FieldVals, Insn);
895 unsigned Size = StartBits.size();
898 // If we have matched all the well-known bits, just issue a return.
900 o.indent(Indentation) << "if (";
901 if (!emitPredicateMatch(o, Indentation, Opc))
904 emitSoftFailCheck(o, Indentation+2, Opc);
905 o.indent(Indentation) << " MI.setOpcode(" << Opc << ");\n";
906 std::map<unsigned, std::vector<OperandInfo> >::const_iterator OpIter =
908 const std::vector<OperandInfo>& InsnOperands = OpIter->second;
909 for (std::vector<OperandInfo>::const_iterator
910 I = InsnOperands.begin(), E = InsnOperands.end(); I != E; ++I) {
911 // If a custom instruction decoder was specified, use that.
912 if (I->numFields() == 0 && I->Decoder.size()) {
913 o.indent(Indentation) << " " << Emitter->GuardPrefix << I->Decoder
914 << "(MI, insn, Address, Decoder)"
915 << Emitter->GuardPostfix << "\n";
919 emitBinaryParser(o, Indentation, *I);
922 o.indent(Indentation) << " return " << Emitter->ReturnOK << "; // "
923 << nameWithID(Opc) << '\n';
924 o.indent(Indentation) << "}\n"; // Closing predicate block.
928 // Otherwise, there are more decodings to be done!
930 // Emit code to match the island(s) for the singleton.
931 o.indent(Indentation) << "// Check ";
933 for (I = Size; I != 0; --I) {
934 o << "Inst{" << EndBits[I-1] << '-' << StartBits[I-1] << "} ";
938 o << "for singleton decoding...\n";
941 o.indent(Indentation) << "if (";
942 if (emitPredicateMatch(o, Indentation, Opc)) {
944 o.indent(Indentation+4);
947 for (I = Size; I != 0; --I) {
948 NumBits = EndBits[I-1] - StartBits[I-1] + 1;
949 o << "fieldFromInstruction" << BitWidth << "(insn, "
950 << StartBits[I-1] << ", " << NumBits
951 << ") == " << FieldVals[I-1];
957 emitSoftFailCheck(o, Indentation+2, Opc);
958 o.indent(Indentation) << " MI.setOpcode(" << Opc << ");\n";
959 std::map<unsigned, std::vector<OperandInfo> >::const_iterator OpIter =
961 const std::vector<OperandInfo>& InsnOperands = OpIter->second;
962 for (std::vector<OperandInfo>::const_iterator
963 I = InsnOperands.begin(), E = InsnOperands.end(); I != E; ++I) {
964 // If a custom instruction decoder was specified, use that.
965 if (I->numFields() == 0 && I->Decoder.size()) {
966 o.indent(Indentation) << " " << Emitter->GuardPrefix << I->Decoder
967 << "(MI, insn, Address, Decoder)"
968 << Emitter->GuardPostfix << "\n";
972 emitBinaryParser(o, Indentation, *I);
974 o.indent(Indentation) << " return " << Emitter->ReturnOK << "; // "
975 << nameWithID(Opc) << '\n';
976 o.indent(Indentation) << "}\n";
981 // Emits code to decode the singleton, and then to decode the rest.
982 void FilterChooser::emitSingletonDecoder(raw_ostream &o, unsigned &Indentation,
983 const Filter &Best) const {
985 unsigned Opc = Best.getSingletonOpc();
987 emitSingletonDecoder(o, Indentation, Opc);
989 // Emit code for the rest.
990 o.indent(Indentation) << "else\n";
993 Best.getVariableFC().emit(o, Indentation);
997 // Assign a single filter and run with it. Top level API client can initialize
998 // with a single filter to start the filtering process.
999 void FilterChooser::runSingleFilter(unsigned startBit, unsigned numBit,
1002 Filter F(*this, startBit, numBit, true);
1003 Filters.push_back(F);
1004 BestIndex = 0; // Sole Filter instance to choose from.
1005 bestFilter().recurse();
1008 // reportRegion is a helper function for filterProcessor to mark a region as
1009 // eligible for use as a filter region.
1010 void FilterChooser::reportRegion(bitAttr_t RA, unsigned StartBit,
1011 unsigned BitIndex, bool AllowMixed) {
1012 if (RA == ATTR_MIXED && AllowMixed)
1013 Filters.push_back(Filter(*this, StartBit, BitIndex - StartBit, true));
1014 else if (RA == ATTR_ALL_SET && !AllowMixed)
1015 Filters.push_back(Filter(*this, StartBit, BitIndex - StartBit, false));
1018 // FilterProcessor scans the well-known encoding bits of the instructions and
1019 // builds up a list of candidate filters. It chooses the best filter and
1020 // recursively descends down the decoding tree.
1021 bool FilterChooser::filterProcessor(bool AllowMixed, bool Greedy) {
1024 unsigned numInstructions = Opcodes.size();
1026 assert(numInstructions && "Filter created with no instructions");
1028 // No further filtering is necessary.
1029 if (numInstructions == 1)
1032 // Heuristics. See also doFilter()'s "Heuristics" comment when num of
1033 // instructions is 3.
1034 if (AllowMixed && !Greedy) {
1035 assert(numInstructions == 3);
1037 for (unsigned i = 0; i < Opcodes.size(); ++i) {
1038 std::vector<unsigned> StartBits;
1039 std::vector<unsigned> EndBits;
1040 std::vector<uint64_t> FieldVals;
1043 insnWithID(Insn, Opcodes[i]);
1045 // Look for islands of undecoded bits of any instruction.
1046 if (getIslands(StartBits, EndBits, FieldVals, Insn) > 0) {
1047 // Found an instruction with island(s). Now just assign a filter.
1048 runSingleFilter(StartBits[0], EndBits[0] - StartBits[0] + 1, true);
1054 unsigned BitIndex, InsnIndex;
1056 // We maintain BIT_WIDTH copies of the bitAttrs automaton.
1057 // The automaton consumes the corresponding bit from each
1060 // Input symbols: 0, 1, and _ (unset).
1061 // States: NONE, FILTERED, ALL_SET, ALL_UNSET, and MIXED.
1062 // Initial state: NONE.
1064 // (NONE) ------- [01] -> (ALL_SET)
1065 // (NONE) ------- _ ----> (ALL_UNSET)
1066 // (ALL_SET) ---- [01] -> (ALL_SET)
1067 // (ALL_SET) ---- _ ----> (MIXED)
1068 // (ALL_UNSET) -- [01] -> (MIXED)
1069 // (ALL_UNSET) -- _ ----> (ALL_UNSET)
1070 // (MIXED) ------ . ----> (MIXED)
1071 // (FILTERED)---- . ----> (FILTERED)
1073 std::vector<bitAttr_t> bitAttrs;
1075 // FILTERED bit positions provide no entropy and are not worthy of pursuing.
1076 // Filter::recurse() set either BIT_TRUE or BIT_FALSE for each position.
1077 for (BitIndex = 0; BitIndex < BitWidth; ++BitIndex)
1078 if (FilterBitValues[BitIndex] == BIT_TRUE ||
1079 FilterBitValues[BitIndex] == BIT_FALSE)
1080 bitAttrs.push_back(ATTR_FILTERED);
1082 bitAttrs.push_back(ATTR_NONE);
1084 for (InsnIndex = 0; InsnIndex < numInstructions; ++InsnIndex) {
1087 insnWithID(insn, Opcodes[InsnIndex]);
1089 for (BitIndex = 0; BitIndex < BitWidth; ++BitIndex) {
1090 switch (bitAttrs[BitIndex]) {
1092 if (insn[BitIndex] == BIT_UNSET)
1093 bitAttrs[BitIndex] = ATTR_ALL_UNSET;
1095 bitAttrs[BitIndex] = ATTR_ALL_SET;
1098 if (insn[BitIndex] == BIT_UNSET)
1099 bitAttrs[BitIndex] = ATTR_MIXED;
1101 case ATTR_ALL_UNSET:
1102 if (insn[BitIndex] != BIT_UNSET)
1103 bitAttrs[BitIndex] = ATTR_MIXED;
1112 // The regionAttr automaton consumes the bitAttrs automatons' state,
1113 // lowest-to-highest.
1115 // Input symbols: F(iltered), (all_)S(et), (all_)U(nset), M(ixed)
1116 // States: NONE, ALL_SET, MIXED
1117 // Initial state: NONE
1119 // (NONE) ----- F --> (NONE)
1120 // (NONE) ----- S --> (ALL_SET) ; and set region start
1121 // (NONE) ----- U --> (NONE)
1122 // (NONE) ----- M --> (MIXED) ; and set region start
1123 // (ALL_SET) -- F --> (NONE) ; and report an ALL_SET region
1124 // (ALL_SET) -- S --> (ALL_SET)
1125 // (ALL_SET) -- U --> (NONE) ; and report an ALL_SET region
1126 // (ALL_SET) -- M --> (MIXED) ; and report an ALL_SET region
1127 // (MIXED) ---- F --> (NONE) ; and report a MIXED region
1128 // (MIXED) ---- S --> (ALL_SET) ; and report a MIXED region
1129 // (MIXED) ---- U --> (NONE) ; and report a MIXED region
1130 // (MIXED) ---- M --> (MIXED)
1132 bitAttr_t RA = ATTR_NONE;
1133 unsigned StartBit = 0;
1135 for (BitIndex = 0; BitIndex < BitWidth; BitIndex++) {
1136 bitAttr_t bitAttr = bitAttrs[BitIndex];
1138 assert(bitAttr != ATTR_NONE && "Bit without attributes");
1146 StartBit = BitIndex;
1149 case ATTR_ALL_UNSET:
1152 StartBit = BitIndex;
1156 llvm_unreachable("Unexpected bitAttr!");
1162 reportRegion(RA, StartBit, BitIndex, AllowMixed);
1167 case ATTR_ALL_UNSET:
1168 reportRegion(RA, StartBit, BitIndex, AllowMixed);
1172 reportRegion(RA, StartBit, BitIndex, AllowMixed);
1173 StartBit = BitIndex;
1177 llvm_unreachable("Unexpected bitAttr!");
1183 reportRegion(RA, StartBit, BitIndex, AllowMixed);
1184 StartBit = BitIndex;
1188 reportRegion(RA, StartBit, BitIndex, AllowMixed);
1189 StartBit = BitIndex;
1192 case ATTR_ALL_UNSET:
1193 reportRegion(RA, StartBit, BitIndex, AllowMixed);
1199 llvm_unreachable("Unexpected bitAttr!");
1202 case ATTR_ALL_UNSET:
1203 llvm_unreachable("regionAttr state machine has no ATTR_UNSET state");
1205 llvm_unreachable("regionAttr state machine has no ATTR_FILTERED state");
1209 // At the end, if we're still in ALL_SET or MIXED states, report a region
1216 reportRegion(RA, StartBit, BitIndex, AllowMixed);
1218 case ATTR_ALL_UNSET:
1221 reportRegion(RA, StartBit, BitIndex, AllowMixed);
1225 // We have finished with the filter processings. Now it's time to choose
1226 // the best performing filter.
1228 bool AllUseless = true;
1229 unsigned BestScore = 0;
1231 for (unsigned i = 0, e = Filters.size(); i != e; ++i) {
1232 unsigned Usefulness = Filters[i].usefulness();
1237 if (Usefulness > BestScore) {
1239 BestScore = Usefulness;
1244 bestFilter().recurse();
1247 } // end of FilterChooser::filterProcessor(bool)
1249 // Decides on the best configuration of filter(s) to use in order to decode
1250 // the instructions. A conflict of instructions may occur, in which case we
1251 // dump the conflict set to the standard error.
1252 void FilterChooser::doFilter() {
1253 unsigned Num = Opcodes.size();
1254 assert(Num && "FilterChooser created with no instructions");
1256 // Try regions of consecutive known bit values first.
1257 if (filterProcessor(false))
1260 // Then regions of mixed bits (both known and unitialized bit values allowed).
1261 if (filterProcessor(true))
1264 // Heuristics to cope with conflict set {t2CMPrs, t2SUBSrr, t2SUBSrs} where
1265 // no single instruction for the maximum ATTR_MIXED region Inst{14-4} has a
1266 // well-known encoding pattern. In such case, we backtrack and scan for the
1267 // the very first consecutive ATTR_ALL_SET region and assign a filter to it.
1268 if (Num == 3 && filterProcessor(true, false))
1271 // If we come to here, the instruction decoding has failed.
1272 // Set the BestIndex to -1 to indicate so.
1276 // Emits code to decode our share of instructions. Returns true if the
1277 // emitted code causes a return, which occurs if we know how to decode
1278 // the instruction at this level or the instruction is not decodeable.
1279 bool FilterChooser::emit(raw_ostream &o, unsigned &Indentation) const {
1280 if (Opcodes.size() == 1)
1281 // There is only one instruction in the set, which is great!
1282 // Call emitSingletonDecoder() to see whether there are any remaining
1284 return emitSingletonDecoder(o, Indentation, Opcodes[0]);
1286 // Choose the best filter to do the decodings!
1287 if (BestIndex != -1) {
1288 const Filter &Best = Filters[BestIndex];
1289 if (Best.getNumFiltered() == 1)
1290 emitSingletonDecoder(o, Indentation, Best);
1292 Best.emit(o, Indentation);
1296 // We don't know how to decode these instructions! Return 0 and dump the
1298 o.indent(Indentation) << "return 0;" << " // Conflict set: ";
1299 for (int i = 0, N = Opcodes.size(); i < N; ++i) {
1300 o << nameWithID(Opcodes[i]);
1307 // Print out useful conflict information for postmortem analysis.
1308 errs() << "Decoding Conflict:\n";
1310 dumpStack(errs(), "\t\t");
1312 for (unsigned i = 0; i < Opcodes.size(); ++i) {
1313 const std::string &Name = nameWithID(Opcodes[i]);
1315 errs() << '\t' << Name << " ";
1317 getBitsField(*AllInstructions[Opcodes[i]]->TheDef, "Inst"));
1324 static bool populateInstruction(const CodeGenInstruction &CGI, unsigned Opc,
1325 std::map<unsigned, std::vector<OperandInfo> > &Operands){
1326 const Record &Def = *CGI.TheDef;
1327 // If all the bit positions are not specified; do not decode this instruction.
1328 // We are bound to fail! For proper disassembly, the well-known encoding bits
1329 // of the instruction must be fully specified.
1331 // This also removes pseudo instructions from considerations of disassembly,
1332 // which is a better design and less fragile than the name matchings.
1333 // Ignore "asm parser only" instructions.
1334 if (Def.getValueAsBit("isAsmParserOnly") ||
1335 Def.getValueAsBit("isCodeGenOnly"))
1338 BitsInit &Bits = getBitsField(Def, "Inst");
1339 if (Bits.allInComplete()) return false;
1341 std::vector<OperandInfo> InsnOperands;
1343 // If the instruction has specified a custom decoding hook, use that instead
1344 // of trying to auto-generate the decoder.
1345 std::string InstDecoder = Def.getValueAsString("DecoderMethod");
1346 if (InstDecoder != "") {
1347 InsnOperands.push_back(OperandInfo(InstDecoder));
1348 Operands[Opc] = InsnOperands;
1352 // Generate a description of the operand of the instruction that we know
1353 // how to decode automatically.
1354 // FIXME: We'll need to have a way to manually override this as needed.
1356 // Gather the outputs/inputs of the instruction, so we can find their
1357 // positions in the encoding. This assumes for now that they appear in the
1358 // MCInst in the order that they're listed.
1359 std::vector<std::pair<Init*, std::string> > InOutOperands;
1360 DagInit *Out = Def.getValueAsDag("OutOperandList");
1361 DagInit *In = Def.getValueAsDag("InOperandList");
1362 for (unsigned i = 0; i < Out->getNumArgs(); ++i)
1363 InOutOperands.push_back(std::make_pair(Out->getArg(i), Out->getArgName(i)));
1364 for (unsigned i = 0; i < In->getNumArgs(); ++i)
1365 InOutOperands.push_back(std::make_pair(In->getArg(i), In->getArgName(i)));
1367 // Search for tied operands, so that we can correctly instantiate
1368 // operands that are not explicitly represented in the encoding.
1369 std::map<std::string, std::string> TiedNames;
1370 for (unsigned i = 0; i < CGI.Operands.size(); ++i) {
1371 int tiedTo = CGI.Operands[i].getTiedRegister();
1373 TiedNames[InOutOperands[i].second] = InOutOperands[tiedTo].second;
1374 TiedNames[InOutOperands[tiedTo].second] = InOutOperands[i].second;
1378 // For each operand, see if we can figure out where it is encoded.
1379 for (std::vector<std::pair<Init*, std::string> >::const_iterator
1380 NI = InOutOperands.begin(), NE = InOutOperands.end(); NI != NE; ++NI) {
1381 std::string Decoder = "";
1383 // At this point, we can locate the field, but we need to know how to
1384 // interpret it. As a first step, require the target to provide callbacks
1385 // for decoding register classes.
1386 // FIXME: This need to be extended to handle instructions with custom
1387 // decoder methods, and operands with (simple) MIOperandInfo's.
1388 TypedInit *TI = dynamic_cast<TypedInit*>(NI->first);
1389 RecordRecTy *Type = dynamic_cast<RecordRecTy*>(TI->getType());
1390 Record *TypeRecord = Type->getRecord();
1392 if (TypeRecord->isSubClassOf("RegisterOperand"))
1393 TypeRecord = TypeRecord->getValueAsDef("RegClass");
1394 if (TypeRecord->isSubClassOf("RegisterClass")) {
1395 Decoder = "Decode" + TypeRecord->getName() + "RegisterClass";
1399 RecordVal *DecoderString = TypeRecord->getValue("DecoderMethod");
1400 StringInit *String = DecoderString ?
1401 dynamic_cast<StringInit*>(DecoderString->getValue()) : 0;
1402 if (!isReg && String && String->getValue() != "")
1403 Decoder = String->getValue();
1405 OperandInfo OpInfo(Decoder);
1406 unsigned Base = ~0U;
1408 unsigned Offset = 0;
1410 for (unsigned bi = 0; bi < Bits.getNumBits(); ++bi) {
1412 VarBitInit *BI = dynamic_cast<VarBitInit*>(Bits.getBit(bi));
1414 Var = dynamic_cast<VarInit*>(BI->getVariable());
1416 Var = dynamic_cast<VarInit*>(Bits.getBit(bi));
1420 OpInfo.addField(Base, Width, Offset);
1428 if (Var->getName() != NI->second &&
1429 Var->getName() != TiedNames[NI->second]) {
1431 OpInfo.addField(Base, Width, Offset);
1442 Offset = BI ? BI->getBitNum() : 0;
1443 } else if (BI && BI->getBitNum() != Offset + Width) {
1444 OpInfo.addField(Base, Width, Offset);
1447 Offset = BI->getBitNum();
1454 OpInfo.addField(Base, Width, Offset);
1456 if (OpInfo.numFields() > 0)
1457 InsnOperands.push_back(OpInfo);
1460 Operands[Opc] = InsnOperands;
1465 // Dumps the instruction encoding bits.
1466 dumpBits(errs(), Bits);
1470 // Dumps the list of operand info.
1471 for (unsigned i = 0, e = CGI.Operands.size(); i != e; ++i) {
1472 const CGIOperandList::OperandInfo &Info = CGI.Operands[i];
1473 const std::string &OperandName = Info.Name;
1474 const Record &OperandDef = *Info.Rec;
1476 errs() << "\t" << OperandName << " (" << OperandDef.getName() << ")\n";
1484 static void emitHelper(llvm::raw_ostream &o, unsigned BitWidth) {
1485 unsigned Indentation = 0;
1486 std::string WidthStr = "uint" + utostr(BitWidth) + "_t";
1490 o.indent(Indentation) << "static " << WidthStr <<
1491 " fieldFromInstruction" << BitWidth <<
1492 "(" << WidthStr <<" insn, unsigned startBit, unsigned numBits)\n";
1494 o.indent(Indentation) << "{\n";
1496 ++Indentation; ++Indentation;
1497 o.indent(Indentation) << "assert(startBit + numBits <= " << BitWidth
1498 << " && \"Instruction field out of bounds!\");\n";
1500 o.indent(Indentation) << WidthStr << " fieldMask;\n";
1502 o.indent(Indentation) << "if (numBits == " << BitWidth << ")\n";
1504 ++Indentation; ++Indentation;
1505 o.indent(Indentation) << "fieldMask = (" << WidthStr << ")-1;\n";
1506 --Indentation; --Indentation;
1508 o.indent(Indentation) << "else\n";
1510 ++Indentation; ++Indentation;
1511 o.indent(Indentation) << "fieldMask = ((1 << numBits) - 1) << startBit;\n";
1512 --Indentation; --Indentation;
1515 o.indent(Indentation) << "return (insn & fieldMask) >> startBit;\n";
1516 --Indentation; --Indentation;
1518 o.indent(Indentation) << "}\n";
1523 // Emits disassembler code for instruction decoding.
1524 void FixedLenDecoderEmitter::run(raw_ostream &o) {
1525 o << "#include \"llvm/MC/MCInst.h\"\n";
1526 o << "#include \"llvm/Support/DataTypes.h\"\n";
1527 o << "#include <assert.h>\n";
1529 o << "namespace llvm {\n\n";
1531 // Parameterize the decoders based on namespace and instruction width.
1532 const std::vector<const CodeGenInstruction*> &NumberedInstructions =
1533 Target.getInstructionsByEnumValue();
1534 std::map<std::pair<std::string, unsigned>,
1535 std::vector<unsigned> > OpcMap;
1536 std::map<unsigned, std::vector<OperandInfo> > Operands;
1538 for (unsigned i = 0; i < NumberedInstructions.size(); ++i) {
1539 const CodeGenInstruction *Inst = NumberedInstructions[i];
1540 const Record *Def = Inst->TheDef;
1541 unsigned Size = Def->getValueAsInt("Size");
1542 if (Def->getValueAsString("Namespace") == "TargetOpcode" ||
1543 Def->getValueAsBit("isPseudo") ||
1544 Def->getValueAsBit("isAsmParserOnly") ||
1545 Def->getValueAsBit("isCodeGenOnly"))
1548 std::string DecoderNamespace = Def->getValueAsString("DecoderNamespace");
1551 if (populateInstruction(*Inst, i, Operands)) {
1552 OpcMap[std::make_pair(DecoderNamespace, Size)].push_back(i);
1557 std::set<unsigned> Sizes;
1558 for (std::map<std::pair<std::string, unsigned>,
1559 std::vector<unsigned> >::const_iterator
1560 I = OpcMap.begin(), E = OpcMap.end(); I != E; ++I) {
1561 // If we haven't visited this instruction width before, emit the
1562 // helper method to extract fields.
1563 if (!Sizes.count(I->first.second)) {
1564 emitHelper(o, 8*I->first.second);
1565 Sizes.insert(I->first.second);
1568 // Emit the decoder for this namespace+width combination.
1569 FilterChooser FC(NumberedInstructions, I->second, Operands,
1570 8*I->first.second, this);
1571 FC.emitTop(o, 0, I->first.first);
1574 o << "\n} // End llvm namespace \n";