1 //===- InstrInfoEmitter.cpp - Generate a Instruction Set Desc. ------------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This tablegen backend is responsible for emitting a description of the target
11 // instruction set for the code generator.
13 //===----------------------------------------------------------------------===//
15 #include "InstrInfoEmitter.h"
16 #include "CodeGenWrappers.h"
19 // runEnums - Print out enum values for all of the instructions.
20 void InstrInfoEmitter::runEnums(std::ostream &OS) {
21 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
23 if (Insts.size() == 0)
24 throw std::string("No 'Instruction' subclasses defined!");
26 std::string Namespace = Insts[0]->getValueAsString("Namespace");
28 EmitSourceFileHeader("Target Instruction Enum Values", OS);
30 if (!Namespace.empty())
31 OS << "namespace " << Namespace << " {\n";
36 // We must emit the PHI opcode first...
37 Record *InstrInfo = Target.getInstructionSet();
38 Record *PHI = InstrInfo->getValueAsDef("PHIInst");
40 OS << " " << PHI->getName() << ", \t// 0 (fixed for all targets)\n";
42 // Print out the rest of the instructions now...
43 for (unsigned i = 0, e = Insts.size(); i != e; ++i)
45 OS << " " << Insts[i]->getName() << ", \t// " << i+1 << "\n";
48 if (!Namespace.empty())
52 void InstrInfoEmitter::printDefList(ListInit *LI, const std::string &Name,
53 std::ostream &OS) const {
54 OS << "static const unsigned " << Name << "[] = { ";
55 for (unsigned j = 0, e = LI->getSize(); j != e; ++j)
56 if (DefInit *DI = dynamic_cast<DefInit*>(LI->getElement(j)))
57 OS << getQualifiedName(DI->getDef()) << ", ";
59 throw "Illegal value in '" + Name + "' list!";
64 // run - Emit the main instruction description records for the target...
65 void InstrInfoEmitter::run(std::ostream &OS) {
66 EmitSourceFileHeader("Target Instruction Descriptors", OS);
68 const std::string &TargetName = Target.getName();
69 Record *InstrInfo = Target.getInstructionSet();
70 Record *PHI = InstrInfo->getValueAsDef("PHIInst");
72 std::vector<Record*> Instructions =
73 Records.getAllDerivedDefinitions("Instruction");
75 // Emit empty implicit uses and defs lists
76 OS << "static const unsigned EmptyImpUses[] = { 0 };\n"
77 << "static const unsigned EmptyImpDefs[] = { 0 };\n";
79 // Emit all of the instruction's implicit uses and defs...
80 for (unsigned i = 0, e = Instructions.size(); i != e; ++i) {
81 Record *Inst = Instructions[i];
82 ListInit *LI = Inst->getValueAsListInit("Uses");
83 if (LI->getSize()) printDefList(LI, Inst->getName()+"ImpUses", OS);
84 LI = Inst->getValueAsListInit("Defs");
85 if (LI->getSize()) printDefList(LI, Inst->getName()+"ImpDefs", OS);
88 OS << "\nstatic const TargetInstrDescriptor " << TargetName
90 emitRecord(PHI, 0, InstrInfo, OS);
92 for (unsigned i = 0, e = Instructions.size(); i != e; ++i)
93 if (Instructions[i] != PHI)
94 emitRecord(Instructions[i], i+1, InstrInfo, OS);
98 void InstrInfoEmitter::emitRecord(Record *R, unsigned Num, Record *InstrInfo,
100 OS << " { \"" << R->getValueAsString("Name")
101 << "\",\t-1, -1, 0, false, 0, 0, 0, 0";
103 // Emit all of the target indepedent flags...
104 if (R->getValueAsBit("isReturn")) OS << "|M_RET_FLAG";
105 if (R->getValueAsBit("isBranch")) OS << "|M_BRANCH_FLAG";
106 if (R->getValueAsBit("isCall" )) OS << "|M_CALL_FLAG";
107 if (R->getValueAsBit("isTwoAddress")) OS << "|M_2_ADDR_FLAG";
108 if (R->getValueAsBit("isTerminator")) OS << "|M_TERMINATOR_FLAG";
111 // Emit all of the target-specific flags...
112 ListInit *LI = InstrInfo->getValueAsListInit("TSFlagsFields");
113 ListInit *Shift = InstrInfo->getValueAsListInit("TSFlagsShifts");
114 if (LI->getSize() != Shift->getSize())
115 throw "Lengths of " + InstrInfo->getName() +
116 ":(TargetInfoFields, TargetInfoPositions) must be equal!";
118 for (unsigned i = 0, e = LI->getSize(); i != e; ++i)
119 emitShiftedValue(R, dynamic_cast<StringInit*>(LI->getElement(i)),
120 dynamic_cast<IntInit*>(Shift->getElement(i)), OS);
124 // Emit the implicit uses and defs lists...
125 LI = R->getValueAsListInit("Uses");
127 OS << "EmptyImpUses, ";
129 OS << R->getName() << "ImpUses, ";
131 LI = R->getValueAsListInit("Defs");
133 OS << "EmptyImpDefs ";
135 OS << R->getName() << "ImpDefs ";
137 OS << " }, // Inst #" << Num << " = " << R->getName() << "\n";
140 void InstrInfoEmitter::emitShiftedValue(Record *R, StringInit *Val,
141 IntInit *ShiftInt, std::ostream &OS) {
142 if (Val == 0 || ShiftInt == 0)
143 throw std::string("Illegal value or shift amount in TargetInfo*!");
144 RecordVal *RV = R->getValue(Val->getValue());
145 int Shift = ShiftInt->getValue();
147 if (RV == 0 || RV->getValue() == 0)
148 throw R->getName() + " doesn't have a field named '" + Val->getValue()+"'!";
150 Init *Value = RV->getValue();
151 if (BitInit *BI = dynamic_cast<BitInit*>(Value)) {
152 if (BI->getValue()) OS << "|(1<<" << Shift << ")";
154 } else if (BitsInit *BI = dynamic_cast<BitsInit*>(Value)) {
155 // Convert the Bits to an integer to print...
156 Init *I = BI->convertInitializerTo(new IntRecTy());
158 if (IntInit *II = dynamic_cast<IntInit*>(I)) {
160 OS << "|(" << II->getValue() << "<<" << Shift << ")";
164 } else if (IntInit *II = dynamic_cast<IntInit*>(Value)) {
165 if (II->getValue()) OS << "|(" << II->getValue() << "<<" << Shift << ")";
169 std::cerr << "Unhandled initializer: " << *Val << "\n";
170 throw "In record '" + R->getName() + "' for TSFlag emission.";