1 //===- InstrInfoEmitter.cpp - Generate a Instruction Set Desc. ------------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This tablegen backend is responsible for emitting a description of the target
11 // instruction set for the code generator.
13 //===----------------------------------------------------------------------===//
15 #include "InstrInfoEmitter.h"
16 #include "CodeGenTarget.h"
20 // runEnums - Print out enum values for all of the instructions.
21 void InstrInfoEmitter::runEnums(std::ostream &OS) {
22 EmitSourceFileHeader("Target Instruction Enum Values", OS);
23 OS << "namespace llvm {\n\n";
27 // We must emit the PHI opcode first...
28 Record *InstrInfo = Target.getInstructionSet();
30 std::string Namespace = Target.inst_begin()->second.Namespace;
32 if (!Namespace.empty())
33 OS << "namespace " << Namespace << " {\n";
36 std::vector<const CodeGenInstruction*> NumberedInstructions;
37 Target.getInstructionsByEnumValue(NumberedInstructions);
39 for (unsigned i = 0, e = NumberedInstructions.size(); i != e; ++i) {
40 OS << " " << NumberedInstructions[i]->TheDef->getName()
41 << ", \t// " << i << "\n";
44 if (!Namespace.empty())
46 OS << "} // End llvm namespace \n";
49 static std::vector<Record*> GetDefList(ListInit *LI, const std::string &Name) {
50 std::vector<Record*> Result;
51 for (unsigned i = 0, e = LI->getSize(); i != e; ++i)
52 if (DefInit *DI = dynamic_cast<DefInit*>(LI->getElement(i)))
53 Result.push_back(DI->getDef());
55 throw "Illegal value in '" + Name + "' list!";
59 void InstrInfoEmitter::printDefList(const std::vector<Record*> &Uses,
60 unsigned Num, std::ostream &OS) const {
61 OS << "static const unsigned ImplicitList" << Num << "[] = { ";
62 for (unsigned i = 0, e = Uses.size(); i != e; ++i)
63 OS << getQualifiedName(Uses[i]) << ", ";
67 static std::vector<Record*> GetOperandInfo(const CodeGenInstruction &Inst) {
68 std::vector<Record*> Result;
69 if (Inst.hasVariableNumberOfOperands)
70 return Result; // No info for variable operand instrs.
72 for (unsigned i = 0, e = Inst.OperandList.size(); i != e; ++i) {
73 if (Inst.OperandList[i].Rec->isSubClassOf("RegisterClass"))
74 Result.push_back(Inst.OperandList[i].Rec);
76 // This might be a multiple operand thing.
77 // FIXME: Targets like X86 have registers in their multi-operand operands.
78 for (unsigned j = 0, e = Inst.OperandList[i].MINumOperands; j != e; ++j)
86 // run - Emit the main instruction description records for the target...
87 void InstrInfoEmitter::run(std::ostream &OS) {
88 EmitSourceFileHeader("Target Instruction Descriptors", OS);
89 OS << "namespace llvm {\n\n";
92 const std::string &TargetName = Target.getName();
93 Record *InstrInfo = Target.getInstructionSet();
94 Record *PHI = InstrInfo->getValueAsDef("PHIInst");
96 // Emit empty implicit uses and defs lists
97 OS << "static const unsigned EmptyImpList[] = { 0 };\n";
99 // Keep track of all of the def lists we have emitted already.
100 std::map<std::vector<Record*>, unsigned> EmittedLists;
101 std::map<ListInit*, unsigned> ListNumbers;
102 unsigned ListNumber = 0;
104 // Emit all of the instruction's implicit uses and defs.
105 for (CodeGenTarget::inst_iterator II = Target.inst_begin(),
106 E = Target.inst_end(); II != E; ++II) {
107 Record *Inst = II->second.TheDef;
108 ListInit *LI = Inst->getValueAsListInit("Uses");
110 std::vector<Record*> Uses = GetDefList(LI, Inst->getName());
111 unsigned &IL = EmittedLists[Uses];
112 if (!IL) printDefList(Uses, IL = ++ListNumber, OS);
113 ListNumbers[LI] = IL;
115 LI = Inst->getValueAsListInit("Defs");
117 std::vector<Record*> Uses = GetDefList(LI, Inst->getName());
118 unsigned &IL = EmittedLists[Uses];
119 if (!IL) printDefList(Uses, IL = ++ListNumber, OS);
120 ListNumbers[LI] = IL;
124 std::map<std::vector<Record*>, unsigned> OperandInfosEmitted;
125 unsigned OperandListNum = 0;
126 OperandInfosEmitted[std::vector<Record*>()] = ++OperandListNum;
128 // Emit all of the operand info records.
130 for (CodeGenTarget::inst_iterator II = Target.inst_begin(),
131 E = Target.inst_end(); II != E; ++II) {
132 std::vector<Record*> OperandInfo = GetOperandInfo(II->second);
133 unsigned &N = OperandInfosEmitted[OperandInfo];
135 N = ++OperandListNum;
136 OS << "static const TargetOperandInfo OperandInfo" << N << "[] = { ";
137 for (unsigned i = 0, e = OperandInfo.size(); i != e; ++i) {
138 if (Record *RC = OperandInfo[i]) {
139 // FIXME: BAD: REQUIRES RUNTIME INIT
140 OS << "{ " << getQualifiedName(RC) << "RegisterClass }, ";
149 // Emit all of the TargetInstrDescriptor records.
151 OS << "\nstatic const TargetInstrDescriptor " << TargetName
153 emitRecord(Target.getPHIInstruction(), 0, InstrInfo, ListNumbers,
154 OperandInfosEmitted, OS);
157 for (CodeGenTarget::inst_iterator II = Target.inst_begin(),
158 E = Target.inst_end(); II != E; ++II)
159 if (II->second.TheDef != PHI)
160 emitRecord(II->second, ++i, InstrInfo, ListNumbers,
161 OperandInfosEmitted, OS);
163 OS << "} // End llvm namespace \n";
166 void InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num,
168 std::map<ListInit*, unsigned> &ListNumbers,
169 std::map<std::vector<Record*>, unsigned> &OpInfo,
172 if (Inst.hasVariableNumberOfOperands)
174 else if (!Inst.OperandList.empty())
175 // Each logical operand can be multiple MI operands.
176 NumOperands = Inst.OperandList.back().MIOperandNo +
177 Inst.OperandList.back().MINumOperands;
182 if (Inst.Name.empty())
183 OS << Inst.TheDef->getName();
186 OS << "\",\t" << NumOperands << ", -1, 0, false, 0, 0, 0, 0";
188 // Emit all of the target indepedent flags...
189 if (Inst.isReturn) OS << "|M_RET_FLAG";
190 if (Inst.isBranch) OS << "|M_BRANCH_FLAG";
191 if (Inst.isBarrier) OS << "|M_BARRIER_FLAG";
192 if (Inst.hasDelaySlot) OS << "|M_DELAY_SLOT_FLAG";
193 if (Inst.isCall) OS << "|M_CALL_FLAG";
194 if (Inst.isLoad) OS << "|M_LOAD_FLAG";
195 if (Inst.isStore) OS << "|M_STORE_FLAG";
196 if (Inst.isTwoAddress) OS << "|M_2_ADDR_FLAG";
197 if (Inst.isConvertibleToThreeAddress) OS << "|M_CONVERTIBLE_TO_3_ADDR";
198 if (Inst.isCommutable) OS << "|M_COMMUTABLE";
199 if (Inst.isTerminator) OS << "|M_TERMINATOR_FLAG";
202 // Emit all of the target-specific flags...
203 ListInit *LI = InstrInfo->getValueAsListInit("TSFlagsFields");
204 ListInit *Shift = InstrInfo->getValueAsListInit("TSFlagsShifts");
205 if (LI->getSize() != Shift->getSize())
206 throw "Lengths of " + InstrInfo->getName() +
207 ":(TargetInfoFields, TargetInfoPositions) must be equal!";
209 for (unsigned i = 0, e = LI->getSize(); i != e; ++i)
210 emitShiftedValue(Inst.TheDef, dynamic_cast<StringInit*>(LI->getElement(i)),
211 dynamic_cast<IntInit*>(Shift->getElement(i)), OS);
215 // Emit the implicit uses and defs lists...
216 LI = Inst.TheDef->getValueAsListInit("Uses");
218 OS << "EmptyImpList, ";
220 OS << "ImplicitList" << ListNumbers[LI] << ", ";
222 LI = Inst.TheDef->getValueAsListInit("Defs");
224 OS << "EmptyImpList, ";
226 OS << "ImplicitList" << ListNumbers[LI] << ", ";
228 // Emit the operand info.
229 std::vector<Record*> OperandInfo = GetOperandInfo(Inst);
230 if (OperandInfo.empty())
233 OS << "OperandInfo" << OpInfo[OperandInfo];
235 OS << " }, // Inst #" << Num << " = " << Inst.TheDef->getName() << "\n";
238 void InstrInfoEmitter::emitShiftedValue(Record *R, StringInit *Val,
239 IntInit *ShiftInt, std::ostream &OS) {
240 if (Val == 0 || ShiftInt == 0)
241 throw std::string("Illegal value or shift amount in TargetInfo*!");
242 RecordVal *RV = R->getValue(Val->getValue());
243 int Shift = ShiftInt->getValue();
245 if (RV == 0 || RV->getValue() == 0)
246 throw R->getName() + " doesn't have a field named '" + Val->getValue()+"'!";
248 Init *Value = RV->getValue();
249 if (BitInit *BI = dynamic_cast<BitInit*>(Value)) {
250 if (BI->getValue()) OS << "|(1<<" << Shift << ")";
252 } else if (BitsInit *BI = dynamic_cast<BitsInit*>(Value)) {
253 // Convert the Bits to an integer to print...
254 Init *I = BI->convertInitializerTo(new IntRecTy());
256 if (IntInit *II = dynamic_cast<IntInit*>(I)) {
258 OS << "|(" << II->getValue() << "<<" << Shift << ")";
262 } else if (IntInit *II = dynamic_cast<IntInit*>(Value)) {
263 if (II->getValue()) OS << "|(" << II->getValue() << "<<" << Shift << ")";
267 std::cerr << "Unhandled initializer: " << *Val << "\n";
268 throw "In record '" + R->getName() + "' for TSFlag emission.";