1 //===- RegisterInfoEmitter.cpp - Generate a Register File Desc. -*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This tablegen backend is responsible for emitting a description of a target
11 // register file for a code generator. It uses instances of the Register,
12 // RegisterAliases, and RegisterClass classes to gather this information.
14 //===----------------------------------------------------------------------===//
16 #include "RegisterInfoEmitter.h"
17 #include "CodeGenTarget.h"
18 #include "CodeGenRegisters.h"
20 #include "llvm/ADT/StringExtras.h"
21 #include "llvm/ADT/STLExtras.h"
25 // runEnums - Print out enum values for all of the registers.
26 void RegisterInfoEmitter::runEnums(std::ostream &OS) {
28 const std::vector<CodeGenRegister> &Registers = Target.getRegisters();
30 std::string Namespace = Registers[0].TheDef->getValueAsString("Namespace");
32 EmitSourceFileHeader("Target Register Enum Values", OS);
33 OS << "namespace llvm {\n\n";
35 if (!Namespace.empty())
36 OS << "namespace " << Namespace << " {\n";
37 OS << " enum {\n NoRegister,\n";
39 for (unsigned i = 0, e = Registers.size(); i != e; ++i)
40 OS << " " << Registers[i].getName() << ", \t// " << i+1 << "\n";
43 if (!Namespace.empty())
45 OS << "} // End llvm namespace \n";
48 void RegisterInfoEmitter::runHeader(std::ostream &OS) {
49 EmitSourceFileHeader("Register Information Header Fragment", OS);
51 const std::string &TargetName = Target.getName();
52 std::string ClassName = TargetName + "GenRegisterInfo";
54 OS << "#include \"llvm/Target/MRegisterInfo.h\"\n";
55 OS << "#include <string>\n\n";
57 OS << "namespace llvm {\n\n";
59 OS << "struct " << ClassName << " : public MRegisterInfo {\n"
61 << "(int CallFrameSetupOpcode = -1, int CallFrameDestroyOpcode = -1);\n"
62 << " const unsigned* getCalleeSaveRegs() const;\n"
63 << "const TargetRegisterClass* const *getCalleeSaveRegClasses() const;\n"
66 const std::vector<CodeGenRegisterClass> &RegisterClasses =
67 Target.getRegisterClasses();
69 if (!RegisterClasses.empty()) {
70 OS << "namespace " << RegisterClasses[0].Namespace
71 << " { // Register classes\n";
72 for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i) {
73 const std::string &Name = RegisterClasses[i].getName();
75 // Output the register class definition.
76 OS << " struct " << Name << "Class : public TargetRegisterClass {\n"
77 << " " << Name << "Class();\n"
78 << RegisterClasses[i].MethodProtos << " };\n";
80 // Output the extern for the instance.
81 OS << " extern " << Name << "Class\t" << Name << "RegClass;\n";
82 // Output the extern for the pointer to the instance (should remove).
83 OS << " static TargetRegisterClass * const "<< Name <<"RegisterClass = &"
84 << Name << "RegClass;\n";
86 OS << "} // end of namespace " << TargetName << "\n\n";
88 OS << "} // End llvm namespace \n";
91 // RegisterInfoEmitter::run - Main register file description emitter.
93 void RegisterInfoEmitter::run(std::ostream &OS) {
95 EmitSourceFileHeader("Register Information Source Fragment", OS);
97 OS << "namespace llvm {\n\n";
99 // Start out by emitting each of the register classes... to do this, we build
100 // a set of registers which belong to a register class, this is to ensure that
101 // each register is only in a single register class.
103 const std::vector<CodeGenRegisterClass> &RegisterClasses =
104 Target.getRegisterClasses();
106 // Loop over all of the register classes... emitting each one.
107 OS << "namespace { // Register classes...\n";
109 // RegClassesBelongedTo - Keep track of which register classes each reg
111 std::multimap<Record*, const CodeGenRegisterClass*> RegClassesBelongedTo;
113 // Emit the register enum value arrays for each RegisterClass
114 for (unsigned rc = 0, e = RegisterClasses.size(); rc != e; ++rc) {
115 const CodeGenRegisterClass &RC = RegisterClasses[rc];
117 // Give the register class a legal C name if it's anonymous.
118 std::string Name = RC.TheDef->getName();
120 // Emit the register list now.
121 OS << " // " << Name << " Register Class...\n const unsigned " << Name
123 for (unsigned i = 0, e = RC.Elements.size(); i != e; ++i) {
124 Record *Reg = RC.Elements[i];
125 OS << getQualifiedName(Reg) << ", ";
127 // Keep track of which regclasses this register is in.
128 RegClassesBelongedTo.insert(std::make_pair(Reg, &RC));
133 // Emit the ValueType arrays for each RegisterClass
134 for (unsigned rc = 0, e = RegisterClasses.size(); rc != e; ++rc) {
135 const CodeGenRegisterClass &RC = RegisterClasses[rc];
137 // Give the register class a legal C name if it's anonymous.
138 std::string Name = RC.TheDef->getName() + "VTs";
140 // Emit the register list now.
142 << " Register Class Value Types...\n const MVT::ValueType " << Name
144 for (unsigned i = 0, e = RC.VTs.size(); i != e; ++i)
145 OS << "MVT::" << RC.VTs[i] << ", ";
146 OS << "MVT::Other\n };\n\n";
148 OS << "} // end anonymous namespace\n\n";
150 // Now that all of the structs have been emitted, emit the instances.
151 if (!RegisterClasses.empty()) {
152 OS << "namespace " << RegisterClasses[0].Namespace
153 << " { // Register class instances\n";
154 for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i)
155 OS << " " << RegisterClasses[i].getName() << "Class\t"
156 << RegisterClasses[i].getName() << "RegClass;\n";
158 for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i) {
159 const CodeGenRegisterClass &RC = RegisterClasses[i];
160 OS << RC.MethodBodies << "\n";
161 OS << RC.getName() << "Class::" << RC.getName()
162 << "Class() : TargetRegisterClass(" << RC.getName() + "VTs" << ", "
163 << RC.SpillSize/8 << ", "
164 << RC.SpillAlignment/8 << ", " << RC.getName() << ", "
165 << RC.getName() << " + " << RC.Elements.size() << ") {}\n";
171 OS << "\nnamespace {\n";
172 OS << " const TargetRegisterClass* const RegisterClasses[] = {\n";
173 for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i)
174 OS << " &" << getQualifiedName(RegisterClasses[i].TheDef)
178 // Emit register class aliases...
179 std::map<Record*, std::set<Record*> > RegisterAliases;
180 const std::vector<CodeGenRegister> &Regs = Target.getRegisters();
182 for (unsigned i = 0, e = Regs.size(); i != e; ++i) {
183 Record *R = Regs[i].TheDef;
184 std::vector<Record*> LI = Regs[i].TheDef->getValueAsListOfDefs("Aliases");
185 // Add information that R aliases all of the elements in the list... and
186 // that everything in the list aliases R.
187 for (unsigned j = 0, e = LI.size(); j != e; ++j) {
189 if (RegisterAliases[R].count(Reg))
190 std::cerr << "Warning: register alias between " << getQualifiedName(R)
191 << " and " << getQualifiedName(Reg)
192 << " specified multiple times!\n";
193 RegisterAliases[R].insert(Reg);
195 if (RegisterAliases[Reg].count(R))
196 std::cerr << "Warning: register alias between " << getQualifiedName(R)
197 << " and " << getQualifiedName(Reg)
198 << " specified multiple times!\n";
199 RegisterAliases[Reg].insert(R);
203 if (!RegisterAliases.empty())
204 OS << "\n\n // Register Alias Sets...\n";
206 // Emit the empty alias list
207 OS << " const unsigned Empty_AliasSet[] = { 0 };\n";
208 // Loop over all of the registers which have aliases, emitting the alias list
210 for (std::map<Record*, std::set<Record*> >::iterator
211 I = RegisterAliases.begin(), E = RegisterAliases.end(); I != E; ++I) {
212 OS << " const unsigned " << I->first->getName() << "_AliasSet[] = { ";
213 for (std::set<Record*>::iterator ASI = I->second.begin(),
214 E = I->second.end(); ASI != E; ++ASI)
215 OS << getQualifiedName(*ASI) << ", ";
219 OS<<"\n const TargetRegisterDesc RegisterDescriptors[] = { // Descriptors\n";
220 OS << " { \"NOREG\",\t0 },\n";
223 // Now that register alias sets have been emitted, emit the register
225 const std::vector<CodeGenRegister> &Registers = Target.getRegisters();
226 for (unsigned i = 0, e = Registers.size(); i != e; ++i) {
227 const CodeGenRegister &Reg = Registers[i];
229 if (!Reg.TheDef->getValueAsString("Name").empty())
230 OS << Reg.TheDef->getValueAsString("Name");
234 if (RegisterAliases.count(Reg.TheDef))
235 OS << Reg.getName() << "_AliasSet },\n";
237 OS << "Empty_AliasSet },\n";
239 OS << " };\n"; // End of register descriptors...
240 OS << "}\n\n"; // End of anonymous namespace...
242 std::string ClassName = Target.getName() + "GenRegisterInfo";
244 // Emit the constructor of the class...
245 OS << ClassName << "::" << ClassName
246 << "(int CallFrameSetupOpcode, int CallFrameDestroyOpcode)\n"
247 << " : MRegisterInfo(RegisterDescriptors, " << Registers.size()+1
248 << ", RegisterClasses, RegisterClasses+" << RegisterClasses.size() <<",\n "
249 << " CallFrameSetupOpcode, CallFrameDestroyOpcode) {}\n\n";
251 // Emit the getCalleeSaveRegs method.
252 OS << "const unsigned* " << ClassName << "::getCalleeSaveRegs() const {\n"
253 << " static const unsigned CalleeSaveRegs[] = {\n ";
255 const std::vector<Record*> &CSR = Target.getCalleeSavedRegisters();
256 for (unsigned i = 0, e = CSR.size(); i != e; ++i)
257 OS << getQualifiedName(CSR[i]) << ", ";
258 OS << " 0\n };\n return CalleeSaveRegs;\n}\n\n";
260 // Emit information about the callee saved register classes.
261 OS << "const TargetRegisterClass* const*\n" << ClassName
262 << "::getCalleeSaveRegClasses() const {\n"
263 << " static const TargetRegisterClass * const "
264 << "CalleeSaveRegClasses[] = {\n ";
266 for (unsigned i = 0, e = CSR.size(); i != e; ++i) {
268 std::multimap<Record*, const CodeGenRegisterClass*>::iterator I, E;
269 tie(I, E) = RegClassesBelongedTo.equal_range(R);
271 throw "Callee saved register '" + R->getName() +
272 "' must belong to a register class for spilling.\n";
273 const CodeGenRegisterClass *RC = (I++)->second;
275 if (RC->SpillSize < I->second->SpillSize)
277 OS << "&" << getQualifiedName(RC->TheDef) << "RegClass, ";
279 OS << " 0\n };\n return CalleeSaveRegClasses;\n}\n\n";
281 OS << "} // End llvm namespace \n";