1 //===- RegisterInfoEmitter.cpp - Generate a Register File Desc. -*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This tablegen backend is responsible for emitting a description of a target
11 // register file for a code generator. It uses instances of the Register,
12 // RegisterAliases, and RegisterClass classes to gather this information.
14 //===----------------------------------------------------------------------===//
16 #include "RegisterInfoEmitter.h"
17 #include "CodeGenTarget.h"
18 #include "CodeGenRegisters.h"
20 #include "llvm/ADT/StringExtras.h"
21 #include "llvm/ADT/STLExtras.h"
25 // runEnums - Print out enum values for all of the registers.
26 void RegisterInfoEmitter::runEnums(std::ostream &OS) {
28 const std::vector<CodeGenRegister> &Registers = Target.getRegisters();
30 std::string Namespace = Registers[0].TheDef->getValueAsString("Namespace");
32 EmitSourceFileHeader("Target Register Enum Values", OS);
33 OS << "namespace llvm {\n\n";
35 if (!Namespace.empty())
36 OS << "namespace " << Namespace << " {\n";
37 OS << " enum {\n NoRegister,\n";
39 for (unsigned i = 0, e = Registers.size(); i != e; ++i)
40 OS << " " << Registers[i].getName() << ", \t// " << i+1 << "\n";
43 if (!Namespace.empty())
45 OS << "} // End llvm namespace \n";
48 void RegisterInfoEmitter::runHeader(std::ostream &OS) {
49 EmitSourceFileHeader("Register Information Header Fragment", OS);
51 const std::string &TargetName = Target.getName();
52 std::string ClassName = TargetName + "GenRegisterInfo";
54 OS << "#include \"llvm/Target/MRegisterInfo.h\"\n\n";
56 OS << "namespace llvm {\n\n";
58 OS << "struct " << ClassName << " : public MRegisterInfo {\n"
60 << "(int CallFrameSetupOpcode = -1, int CallFrameDestroyOpcode = -1);\n"
61 << " const unsigned* getCalleeSaveRegs() const;\n"
62 << "const TargetRegisterClass* const *getCalleeSaveRegClasses() const;\n"
65 const std::vector<CodeGenRegisterClass> &RegisterClasses =
66 Target.getRegisterClasses();
68 if (!RegisterClasses.empty()) {
69 OS << "namespace " << RegisterClasses[0].Namespace
70 << " { // Register classes\n";
71 for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i) {
72 const std::string &Name = RegisterClasses[i].getName();
74 // Output the register class definition.
75 OS << " struct " << Name << "Class : public TargetRegisterClass {\n"
76 << " " << Name << "Class();\n"
77 << RegisterClasses[i].MethodProtos << " };\n";
79 // Output the extern for the instance.
80 OS << " extern " << Name << "Class\t" << Name << "RegClass;\n";
81 // Output the extern for the pointer to the instance (should remove).
82 OS << " static TargetRegisterClass * const "<< Name <<"RegisterClass = &"
83 << Name << "RegClass;\n";
85 OS << "} // end of namespace " << TargetName << "\n\n";
87 OS << "} // End llvm namespace \n";
90 // RegisterInfoEmitter::run - Main register file description emitter.
92 void RegisterInfoEmitter::run(std::ostream &OS) {
94 EmitSourceFileHeader("Register Information Source Fragment", OS);
96 OS << "namespace llvm {\n\n";
98 // Start out by emitting each of the register classes... to do this, we build
99 // a set of registers which belong to a register class, this is to ensure that
100 // each register is only in a single register class.
102 const std::vector<CodeGenRegisterClass> &RegisterClasses =
103 Target.getRegisterClasses();
105 // Loop over all of the register classes... emitting each one.
106 OS << "namespace { // Register classes...\n";
108 // RegClassesBelongedTo - Keep track of which register classes each reg
110 std::multimap<Record*, const CodeGenRegisterClass*> RegClassesBelongedTo;
112 for (unsigned rc = 0, e = RegisterClasses.size(); rc != e; ++rc) {
113 const CodeGenRegisterClass &RC = RegisterClasses[rc];
115 // Give the register class a legal C name if it's anonymous.
116 std::string Name = RC.TheDef->getName();
118 // Emit the register list now.
119 OS << " // " << Name << " Register Class...\n const unsigned " << Name
121 for (unsigned i = 0, e = RC.Elements.size(); i != e; ++i) {
122 Record *Reg = RC.Elements[i];
123 OS << getQualifiedName(Reg) << ", ";
125 // Keep track of which regclasses this register is in.
126 RegClassesBelongedTo.insert(std::make_pair(Reg, &RC));
130 OS << "} // end anonymous namespace\n\n";
132 // Now that all of the structs have been emitted, emit the instances.
133 if (!RegisterClasses.empty()) {
134 OS << "namespace " << RegisterClasses[0].Namespace
135 << " { // Register class instances\n";
136 for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i)
137 OS << " " << RegisterClasses[i].getName() << "Class\t"
138 << RegisterClasses[i].getName() << "RegClass;\n";
140 for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i) {
141 const CodeGenRegisterClass &RC = RegisterClasses[i];
142 OS << RC.MethodBodies << "\n";
143 OS << RC.getName() << "Class::" << RC.getName()
144 << "Class() : TargetRegisterClass(MVT::" << getEnumName(RC.VT) << ","
145 << RC.SpillSize/8 << ", "
146 << RC.SpillAlignment/8 << ", " << RC.getName() << ", "
147 << RC.getName() << " + " << RC.Elements.size() << ") {}\n";
153 OS << "\nnamespace {\n";
154 OS << " const TargetRegisterClass* const RegisterClasses[] = {\n";
155 for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i)
156 OS << " &" << getQualifiedName(RegisterClasses[i].TheDef)
160 // Emit register class aliases...
161 std::map<Record*, std::set<Record*> > RegisterAliases;
162 const std::vector<CodeGenRegister> &Regs = Target.getRegisters();
164 for (unsigned i = 0, e = Regs.size(); i != e; ++i) {
165 Record *R = Regs[i].TheDef;
166 ListInit *LI = Regs[i].TheDef->getValueAsListInit("Aliases");
167 // Add information that R aliases all of the elements in the list... and
168 // that everything in the list aliases R.
169 for (unsigned j = 0, e = LI->getSize(); j != e; ++j) {
170 DefInit *Reg = dynamic_cast<DefInit*>(LI->getElement(j));
171 if (!Reg) throw "ERROR: Alias list element is not a def!";
172 if (RegisterAliases[R].count(Reg->getDef()))
173 std::cerr << "Warning: register alias between " << getQualifiedName(R)
174 << " and " << getQualifiedName(Reg->getDef())
175 << " specified multiple times!\n";
176 RegisterAliases[R].insert(Reg->getDef());
178 if (RegisterAliases[Reg->getDef()].count(R))
179 std::cerr << "Warning: register alias between " << getQualifiedName(R)
180 << " and " << getQualifiedName(Reg->getDef())
181 << " specified multiple times!\n";
182 RegisterAliases[Reg->getDef()].insert(R);
186 if (!RegisterAliases.empty())
187 OS << "\n\n // Register Alias Sets...\n";
189 // Emit the empty alias list
190 OS << " const unsigned Empty_AliasSet[] = { 0 };\n";
191 // Loop over all of the registers which have aliases, emitting the alias list
193 for (std::map<Record*, std::set<Record*> >::iterator
194 I = RegisterAliases.begin(), E = RegisterAliases.end(); I != E; ++I) {
195 OS << " const unsigned " << I->first->getName() << "_AliasSet[] = { ";
196 for (std::set<Record*>::iterator ASI = I->second.begin(),
197 E = I->second.end(); ASI != E; ++ASI)
198 OS << getQualifiedName(*ASI) << ", ";
202 OS<<"\n const TargetRegisterDesc RegisterDescriptors[] = { // Descriptors\n";
203 OS << " { \"NOREG\",\t0 },\n";
206 // Now that register alias sets have been emitted, emit the register
208 const std::vector<CodeGenRegister> &Registers = Target.getRegisters();
209 for (unsigned i = 0, e = Registers.size(); i != e; ++i) {
210 const CodeGenRegister &Reg = Registers[i];
212 if (!Reg.TheDef->getValueAsString("Name").empty())
213 OS << Reg.TheDef->getValueAsString("Name");
217 if (RegisterAliases.count(Reg.TheDef))
218 OS << Reg.getName() << "_AliasSet },\n";
220 OS << "Empty_AliasSet },\n";
222 OS << " };\n"; // End of register descriptors...
223 OS << "}\n\n"; // End of anonymous namespace...
225 std::string ClassName = Target.getName() + "GenRegisterInfo";
227 // Emit the constructor of the class...
228 OS << ClassName << "::" << ClassName
229 << "(int CallFrameSetupOpcode, int CallFrameDestroyOpcode)\n"
230 << " : MRegisterInfo(RegisterDescriptors, " << Registers.size()+1
231 << ", RegisterClasses, RegisterClasses+" << RegisterClasses.size() <<",\n "
232 << " CallFrameSetupOpcode, CallFrameDestroyOpcode) {}\n\n";
234 // Emit the getCalleeSaveRegs method.
235 OS << "const unsigned* " << ClassName << "::getCalleeSaveRegs() const {\n"
236 << " static const unsigned CalleeSaveRegs[] = {\n ";
238 const std::vector<Record*> &CSR = Target.getCalleeSavedRegisters();
239 for (unsigned i = 0, e = CSR.size(); i != e; ++i)
240 OS << getQualifiedName(CSR[i]) << ", ";
241 OS << " 0\n };\n return CalleeSaveRegs;\n}\n\n";
243 // Emit information about the callee saved register classes.
244 OS << "const TargetRegisterClass* const*\n" << ClassName
245 << "::getCalleeSaveRegClasses() const {\n"
246 << " static const TargetRegisterClass * const "
247 << "CalleeSaveRegClasses[] = {\n ";
249 for (unsigned i = 0, e = CSR.size(); i != e; ++i) {
251 std::multimap<Record*, const CodeGenRegisterClass*>::iterator I, E;
252 tie(I, E) = RegClassesBelongedTo.equal_range(R);
254 throw "Callee saved register '" + R->getName() +
255 "' must belong to a register class for spilling.\n";
256 const CodeGenRegisterClass *RC = (I++)->second;
258 if (RC->SpillSize < I->second->SpillSize)
260 OS << "&" << getQualifiedName(RC->TheDef) << "RegClass, ";
262 OS << " 0\n };\n return CalleeSaveRegClasses;\n}\n\n";
264 OS << "} // End llvm namespace \n";