1 //===- RegisterInfoEmitter.cpp - Generate a Register File Desc. -*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This tablegen backend is responsible for emitting a description of a target
11 // register file for a code generator. It uses instances of the Register,
12 // RegisterAliases, and RegisterClass classes to gather this information.
14 //===----------------------------------------------------------------------===//
16 #include "RegisterInfoEmitter.h"
17 #include "CodeGenTarget.h"
18 #include "CodeGenRegisters.h"
20 #include "llvm/ADT/StringExtras.h"
21 #include "llvm/ADT/STLExtras.h"
25 // runEnums - Print out enum values for all of the registers.
26 void RegisterInfoEmitter::runEnums(std::ostream &OS) {
28 const std::vector<CodeGenRegister> &Registers = Target.getRegisters();
30 std::string Namespace = Registers[0].TheDef->getValueAsString("Namespace");
32 EmitSourceFileHeader("Target Register Enum Values", OS);
33 OS << "namespace llvm {\n\n";
35 if (!Namespace.empty())
36 OS << "namespace " << Namespace << " {\n";
37 OS << " enum {\n NoRegister,\n";
39 for (unsigned i = 0, e = Registers.size(); i != e; ++i)
40 OS << " " << Registers[i].getName() << (i != (e-1) ? ", \t// " : " \t// ") << i+1 << "\n";
43 if (!Namespace.empty())
45 OS << "} // End llvm namespace \n";
48 void RegisterInfoEmitter::runHeader(std::ostream &OS) {
49 EmitSourceFileHeader("Register Information Header Fragment", OS);
51 const std::string &TargetName = Target.getName();
52 std::string ClassName = TargetName + "GenRegisterInfo";
54 OS << "#include \"llvm/Target/MRegisterInfo.h\"\n";
55 OS << "#include <string>\n\n";
57 OS << "namespace llvm {\n\n";
59 OS << "struct " << ClassName << " : public MRegisterInfo {\n"
61 << "(int CallFrameSetupOpcode = -1, int CallFrameDestroyOpcode = -1);\n"
62 << " int getDwarfRegNum(unsigned RegNum) const;\n"
65 const std::vector<CodeGenRegisterClass> &RegisterClasses =
66 Target.getRegisterClasses();
68 if (!RegisterClasses.empty()) {
69 OS << "namespace " << RegisterClasses[0].Namespace
70 << " { // Register classes\n";
71 for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i) {
72 const std::string &Name = RegisterClasses[i].getName();
74 // Output the register class definition.
75 OS << " struct " << Name << "Class : public TargetRegisterClass {\n"
76 << " " << Name << "Class();\n"
77 << RegisterClasses[i].MethodProtos << " };\n";
79 // Output the extern for the instance.
80 OS << " extern " << Name << "Class\t" << Name << "RegClass;\n";
81 // Output the extern for the pointer to the instance (should remove).
82 OS << " static TargetRegisterClass * const "<< Name <<"RegisterClass = &"
83 << Name << "RegClass;\n";
85 OS << "} // end of namespace " << TargetName << "\n\n";
87 OS << "} // End llvm namespace \n";
90 bool isSubRegisterClass(const CodeGenRegisterClass &RC,
91 std::set<Record*> &RegSet) {
92 for (unsigned i = 0, e = RC.Elements.size(); i != e; ++i) {
93 Record *Reg = RC.Elements[i];
94 if (!RegSet.count(Reg))
100 // RegisterInfoEmitter::run - Main register file description emitter.
102 void RegisterInfoEmitter::run(std::ostream &OS) {
103 CodeGenTarget Target;
104 EmitSourceFileHeader("Register Information Source Fragment", OS);
106 OS << "namespace llvm {\n\n";
108 // Start out by emitting each of the register classes... to do this, we build
109 // a set of registers which belong to a register class, this is to ensure that
110 // each register is only in a single register class.
112 const std::vector<CodeGenRegisterClass> &RegisterClasses =
113 Target.getRegisterClasses();
115 // Loop over all of the register classes... emitting each one.
116 OS << "namespace { // Register classes...\n";
118 // RegClassesBelongedTo - Keep track of which register classes each reg
120 std::multimap<Record*, const CodeGenRegisterClass*> RegClassesBelongedTo;
122 // Emit the register enum value arrays for each RegisterClass
123 for (unsigned rc = 0, e = RegisterClasses.size(); rc != e; ++rc) {
124 const CodeGenRegisterClass &RC = RegisterClasses[rc];
126 // Give the register class a legal C name if it's anonymous.
127 std::string Name = RC.TheDef->getName();
129 // Emit the register list now.
130 OS << " // " << Name << " Register Class...\n"
131 << " static const unsigned " << Name
133 for (unsigned i = 0, e = RC.Elements.size(); i != e; ++i) {
134 Record *Reg = RC.Elements[i];
135 OS << getQualifiedName(Reg) << ", ";
137 // Keep track of which regclasses this register is in.
138 RegClassesBelongedTo.insert(std::make_pair(Reg, &RC));
143 // Emit the ValueType arrays for each RegisterClass
144 for (unsigned rc = 0, e = RegisterClasses.size(); rc != e; ++rc) {
145 const CodeGenRegisterClass &RC = RegisterClasses[rc];
147 // Give the register class a legal C name if it's anonymous.
148 std::string Name = RC.TheDef->getName() + "VTs";
150 // Emit the register list now.
152 << " Register Class Value Types...\n const MVT::ValueType " << Name
154 for (unsigned i = 0, e = RC.VTs.size(); i != e; ++i)
155 OS << RC.VTs[i] << ", ";
156 OS << "MVT::Other\n };\n\n";
158 OS << "} // end anonymous namespace\n\n";
160 // Now that all of the structs have been emitted, emit the instances.
161 if (!RegisterClasses.empty()) {
162 OS << "namespace " << RegisterClasses[0].Namespace
163 << " { // Register class instances\n";
164 for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i)
165 OS << " " << RegisterClasses[i].getName() << "Class\t"
166 << RegisterClasses[i].getName() << "RegClass;\n";
168 std::map<unsigned, std::set<unsigned> > SuperClassMap;
170 // Emit the sub-classes array for each RegisterClass
171 for (unsigned rc = 0, e = RegisterClasses.size(); rc != e; ++rc) {
172 const CodeGenRegisterClass &RC = RegisterClasses[rc];
174 // Give the register class a legal C name if it's anonymous.
175 std::string Name = RC.TheDef->getName();
177 std::set<Record*> RegSet;
178 for (unsigned i = 0, e = RC.Elements.size(); i != e; ++i) {
179 Record *Reg = RC.Elements[i];
184 << " Register Class sub-classes...\n"
185 << " static const TargetRegisterClass* "
186 << Name << "Subclasses [] = {\n ";
189 for (unsigned rc2 = 0, e2 = RegisterClasses.size(); rc2 != e2; ++rc2) {
190 const CodeGenRegisterClass &RC2 = RegisterClasses[rc2];
191 if (rc == rc2 || RC2.Elements.size() > RC.Elements.size() ||
192 RC.SpillSize != RC2.SpillSize || !isSubRegisterClass(RC2, RegSet))
195 if (!Empty) OS << ", ";
196 OS << "&" << getQualifiedName(RC2.TheDef) << "RegClass";
199 std::map<unsigned, std::set<unsigned> >::iterator SCMI =
200 SuperClassMap.find(rc2);
201 if (SCMI == SuperClassMap.end()) {
202 SuperClassMap.insert(std::make_pair(rc2, std::set<unsigned>()));
203 SCMI = SuperClassMap.find(rc2);
205 SCMI->second.insert(rc);
208 OS << (!Empty ? ", " : "") << "NULL";
212 for (unsigned rc = 0, e = RegisterClasses.size(); rc != e; ++rc) {
213 const CodeGenRegisterClass &RC = RegisterClasses[rc];
215 // Give the register class a legal C name if it's anonymous.
216 std::string Name = RC.TheDef->getName();
219 << " Register Class super-classes...\n"
220 << " static const TargetRegisterClass* "
221 << Name << "Superclasses [] = {\n ";
224 std::map<unsigned, std::set<unsigned> >::iterator I =
225 SuperClassMap.find(rc);
226 if (I != SuperClassMap.end()) {
227 for (std::set<unsigned>::iterator II = I->second.begin(),
228 EE = I->second.end(); II != EE; ++II) {
229 const CodeGenRegisterClass &RC2 = RegisterClasses[*II];
230 if (!Empty) OS << ", ";
231 OS << "&" << getQualifiedName(RC2.TheDef) << "RegClass";
236 OS << (!Empty ? ", " : "") << "NULL";
241 for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i) {
242 const CodeGenRegisterClass &RC = RegisterClasses[i];
243 OS << RC.MethodBodies << "\n";
244 OS << RC.getName() << "Class::" << RC.getName()
245 << "Class() : TargetRegisterClass("
246 << RC.getName() + "VTs" << ", "
247 << RC.getName() + "Subclasses" << ", "
248 << RC.getName() + "Superclasses" << ", "
249 << RC.SpillSize/8 << ", "
250 << RC.SpillAlignment/8 << ", " << RC.getName() << ", "
251 << RC.getName() << " + " << RC.Elements.size() << ") {}\n";
257 OS << "\nnamespace {\n";
258 OS << " const TargetRegisterClass* const RegisterClasses[] = {\n";
259 for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i)
260 OS << " &" << getQualifiedName(RegisterClasses[i].TheDef)
264 // Emit register class aliases...
265 std::map<Record*, std::set<Record*> > RegisterAliases;
266 const std::vector<CodeGenRegister> &Regs = Target.getRegisters();
268 for (unsigned i = 0, e = Regs.size(); i != e; ++i) {
269 Record *R = Regs[i].TheDef;
270 std::vector<Record*> LI = Regs[i].TheDef->getValueAsListOfDefs("Aliases");
271 // Add information that R aliases all of the elements in the list... and
272 // that everything in the list aliases R.
273 for (unsigned j = 0, e = LI.size(); j != e; ++j) {
275 if (RegisterAliases[R].count(Reg))
276 std::cerr << "Warning: register alias between " << getQualifiedName(R)
277 << " and " << getQualifiedName(Reg)
278 << " specified multiple times!\n";
279 RegisterAliases[R].insert(Reg);
281 if (RegisterAliases[Reg].count(R))
282 std::cerr << "Warning: register alias between " << getQualifiedName(R)
283 << " and " << getQualifiedName(Reg)
284 << " specified multiple times!\n";
285 RegisterAliases[Reg].insert(R);
289 if (!RegisterAliases.empty())
290 OS << "\n\n // Register Alias Sets...\n";
292 // Emit the empty alias list
293 OS << " const unsigned Empty_AliasSet[] = { 0 };\n";
294 // Loop over all of the registers which have aliases, emitting the alias list
296 for (std::map<Record*, std::set<Record*> >::iterator
297 I = RegisterAliases.begin(), E = RegisterAliases.end(); I != E; ++I) {
298 OS << " const unsigned " << I->first->getName() << "_AliasSet[] = { ";
299 for (std::set<Record*>::iterator ASI = I->second.begin(),
300 E = I->second.end(); ASI != E; ++ASI)
301 OS << getQualifiedName(*ASI) << ", ";
305 OS<<"\n const TargetRegisterDesc RegisterDescriptors[] = { // Descriptors\n";
306 OS << " { \"NOREG\",\t0 },\n";
309 // Now that register alias sets have been emitted, emit the register
311 const std::vector<CodeGenRegister> &Registers = Target.getRegisters();
312 for (unsigned i = 0, e = Registers.size(); i != e; ++i) {
313 const CodeGenRegister &Reg = Registers[i];
315 if (!Reg.TheDef->getValueAsString("Name").empty())
316 OS << Reg.TheDef->getValueAsString("Name");
320 if (RegisterAliases.count(Reg.TheDef))
321 OS << Reg.getName() << "_AliasSet },\n";
323 OS << "Empty_AliasSet },\n";
325 OS << " };\n"; // End of register descriptors...
326 OS << "}\n\n"; // End of anonymous namespace...
328 std::string ClassName = Target.getName() + "GenRegisterInfo";
330 // Emit the constructor of the class...
331 OS << ClassName << "::" << ClassName
332 << "(int CallFrameSetupOpcode, int CallFrameDestroyOpcode)\n"
333 << " : MRegisterInfo(RegisterDescriptors, " << Registers.size()+1
334 << ", RegisterClasses, RegisterClasses+" << RegisterClasses.size() <<",\n "
335 << " CallFrameSetupOpcode, CallFrameDestroyOpcode) {}\n\n";
337 // Emit information about the dwarf register numbers.
338 OS << "int " << ClassName << "::getDwarfRegNum(unsigned RegNum) const {\n";
339 OS << " static const int DwarfRegNums[] = { -1, // NoRegister";
340 for (unsigned i = 0, e = Registers.size(); i != e; ++i) {
341 if (!(i % 16)) OS << "\n ";
342 const CodeGenRegister &Reg = Registers[i];
343 int DwarfRegNum = Reg.TheDef->getValueAsInt("DwarfNumber");
345 if ((i + 1) != e) OS << ", ";
348 OS << " assert(RegNum < (sizeof(DwarfRegNums)/sizeof(int)) &&\n";
349 OS << " \"RegNum exceeds number of registers\");\n";
350 OS << " return DwarfRegNums[RegNum];\n";
353 OS << "} // End llvm namespace \n";