1 //===- SubtargetEmitter.cpp - Generate subtarget enumerations -------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This tablegen backend emits subtarget enumerations.
12 //===----------------------------------------------------------------------===//
14 #include "SubtargetEmitter.h"
15 #include "CodeGenTarget.h"
17 #include "llvm/ADT/StringExtras.h"
18 #include "llvm/Support/Debug.h"
23 // Enumeration - Emit the specified class as an enumeration.
25 void SubtargetEmitter::Enumeration(raw_ostream &OS,
26 const char *ClassName,
28 // Get all records of class and sort
29 std::vector<Record*> DefList = Records.getAllDerivedDefinitions(ClassName);
30 std::sort(DefList.begin(), DefList.end(), LessRecord());
36 unsigned N = DefList.size();
38 errs() << "Too many (> 64) subtarget features!\n";
42 for (unsigned i = 0; i < N;) {
44 Record *Def = DefList[i];
47 OS << " " << Def->getName();
49 // If bit flags then emit expression (1 << i)
50 if (isBits) OS << " = " << " 1ULL << " << i;
52 // Depending on 'if more in the list' emit comma
53 if (++i < N) OS << ",";
63 // FeatureKeyValues - Emit data of all the subtarget features. Used by the
66 void SubtargetEmitter::FeatureKeyValues(raw_ostream &OS) {
67 // Gather and sort all the features
68 std::vector<Record*> FeatureList =
69 Records.getAllDerivedDefinitions("SubtargetFeature");
70 std::sort(FeatureList.begin(), FeatureList.end(), LessRecordFieldName());
72 // Begin feature table
73 OS << "// Sorted (by key) array of values for CPU features.\n"
74 << "static const llvm::SubtargetFeatureKV FeatureKV[] = {\n";
77 for (unsigned i = 0, N = FeatureList.size(); i < N; ++i) {
79 Record *Feature = FeatureList[i];
81 const std::string &Name = Feature->getName();
82 const std::string &CommandLineName = Feature->getValueAsString("Name");
83 const std::string &Desc = Feature->getValueAsString("Desc");
85 if (CommandLineName.empty()) continue;
87 // Emit as { "feature", "description", featureEnum, i1 | i2 | ... | in }
89 << "\"" << CommandLineName << "\", "
90 << "\"" << Desc << "\", "
93 const std::vector<Record*> &ImpliesList =
94 Feature->getValueAsListOfDefs("Implies");
96 if (ImpliesList.empty()) {
99 for (unsigned j = 0, M = ImpliesList.size(); j < M;) {
100 OS << ImpliesList[j]->getName();
101 if (++j < M) OS << " | ";
107 // Depending on 'if more in the list' emit comma
108 if ((i + 1) < N) OS << ",";
116 // Emit size of table
118 OS<<" FeatureKVSize = sizeof(FeatureKV)/sizeof(llvm::SubtargetFeatureKV)\n";
123 // CPUKeyValues - Emit data of all the subtarget processors. Used by command
126 void SubtargetEmitter::CPUKeyValues(raw_ostream &OS) {
127 // Gather and sort processor information
128 std::vector<Record*> ProcessorList =
129 Records.getAllDerivedDefinitions("Processor");
130 std::sort(ProcessorList.begin(), ProcessorList.end(), LessRecordFieldName());
132 // Begin processor table
133 OS << "// Sorted (by key) array of values for CPU subtype.\n"
134 << "static const llvm::SubtargetFeatureKV SubTypeKV[] = {\n";
136 // For each processor
137 for (unsigned i = 0, N = ProcessorList.size(); i < N;) {
139 Record *Processor = ProcessorList[i];
141 const std::string &Name = Processor->getValueAsString("Name");
142 const std::vector<Record*> &FeatureList =
143 Processor->getValueAsListOfDefs("Features");
145 // Emit as { "cpu", "description", f1 | f2 | ... fn },
147 << "\"" << Name << "\", "
148 << "\"Select the " << Name << " processor\", ";
150 if (FeatureList.empty()) {
153 for (unsigned j = 0, M = FeatureList.size(); j < M;) {
154 OS << FeatureList[j]->getName();
155 if (++j < M) OS << " | ";
159 // The "0" is for the "implies" section of this data structure.
162 // Depending on 'if more in the list' emit comma
163 if (++i < N) OS << ",";
168 // End processor table
171 // Emit size of table
173 OS<<" SubTypeKVSize = sizeof(SubTypeKV)/sizeof(llvm::SubtargetFeatureKV)\n";
178 // CollectAllItinClasses - Gathers and enumerates all the itinerary classes.
179 // Returns itinerary class count.
181 unsigned SubtargetEmitter::
182 CollectAllItinClasses(raw_ostream &OS,
183 std::map<std::string, unsigned> &ItinClassesMap,
184 std::vector<Record*> &ItinClassList) {
185 // For each itinerary class
186 unsigned N = ItinClassList.size();
187 for (unsigned i = 0; i < N; i++) {
188 // Next itinerary class
189 const Record *ItinClass = ItinClassList[i];
190 // Get name of itinerary class
191 // Assign itinerary class a unique number
192 ItinClassesMap[ItinClass->getName()] = i;
195 // Emit size of table
197 OS<<" ItinClassesSize = " << N << "\n";
200 // Return itinerary class count
205 // FormItineraryStageString - Compose a string containing the stage
206 // data initialization for the specified itinerary. N is the number
209 void SubtargetEmitter::FormItineraryStageString(const std::string &Name,
211 std::string &ItinString,
214 const std::vector<Record*> &StageList =
215 ItinData->getValueAsListOfDefs("Stages");
218 unsigned N = NStages = StageList.size();
219 for (unsigned i = 0; i < N;) {
221 const Record *Stage = StageList[i];
223 // Form string as ,{ cycles, u1 | u2 | ... | un, timeinc, kind }
224 int Cycles = Stage->getValueAsInt("Cycles");
225 ItinString += " { " + itostr(Cycles) + ", ";
228 const std::vector<Record*> &UnitList = Stage->getValueAsListOfDefs("Units");
231 for (unsigned j = 0, M = UnitList.size(); j < M;) {
232 // Add name and bitwise or
233 ItinString += Name + "FU::" + UnitList[j]->getName();
234 if (++j < M) ItinString += " | ";
237 int TimeInc = Stage->getValueAsInt("TimeInc");
238 ItinString += ", " + itostr(TimeInc);
240 int Kind = Stage->getValueAsInt("Kind");
241 ItinString += ", (llvm::InstrStage::ReservationKinds)" + itostr(Kind);
245 if (++i < N) ItinString += ", ";
250 // FormItineraryOperandCycleString - Compose a string containing the
251 // operand cycle initialization for the specified itinerary. N is the
252 // number of operands that has cycles specified.
254 void SubtargetEmitter::FormItineraryOperandCycleString(Record *ItinData,
255 std::string &ItinString, unsigned &NOperandCycles) {
256 // Get operand cycle list
257 const std::vector<int64_t> &OperandCycleList =
258 ItinData->getValueAsListOfInts("OperandCycles");
260 // For each operand cycle
261 unsigned N = NOperandCycles = OperandCycleList.size();
262 for (unsigned i = 0; i < N;) {
263 // Next operand cycle
264 const int OCycle = OperandCycleList[i];
266 ItinString += " " + itostr(OCycle);
267 if (++i < N) ItinString += ", ";
271 void SubtargetEmitter::FormItineraryBypassString(const std::string &Name,
273 std::string &ItinString,
274 unsigned NOperandCycles) {
275 const std::vector<Record*> &BypassList =
276 ItinData->getValueAsListOfDefs("Bypasses");
277 unsigned N = BypassList.size();
280 ItinString += Name + "Bypass::" + BypassList[i]->getName();
281 if (++i < NOperandCycles) ItinString += ", ";
283 for (; i < NOperandCycles;) {
285 if (++i < NOperandCycles) ItinString += ", ";
290 // EmitStageAndOperandCycleData - Generate unique itinerary stages and
291 // operand cycle tables. Record itineraries for processors.
293 void SubtargetEmitter::EmitStageAndOperandCycleData(raw_ostream &OS,
294 unsigned NItinClasses,
295 std::map<std::string, unsigned> &ItinClassesMap,
296 std::vector<Record*> &ItinClassList,
297 std::vector<std::vector<InstrItinerary> > &ProcList) {
298 // Gather processor iteraries
299 std::vector<Record*> ProcItinList =
300 Records.getAllDerivedDefinitions("ProcessorItineraries");
302 // If just no itinerary then don't bother
303 if (ProcItinList.size() < 2) return;
305 // Emit functional units for all the itineraries.
306 for (unsigned i = 0, N = ProcItinList.size(); i < N; ++i) {
308 Record *Proc = ProcItinList[i];
310 std::vector<Record*> FUs = Proc->getValueAsListOfDefs("FU");
314 const std::string &Name = Proc->getName();
315 OS << "\n// Functional units for itineraries \"" << Name << "\"\n"
316 << "namespace " << Name << "FU {\n";
318 for (unsigned j = 0, FUN = FUs.size(); j < FUN; ++j)
319 OS << " const unsigned " << FUs[j]->getName()
320 << " = 1 << " << j << ";\n";
324 std::vector<Record*> BPs = Proc->getValueAsListOfDefs("BP");
326 OS << "\n// Pipeline forwarding pathes for itineraries \"" << Name
327 << "\"\n" << "namespace " << Name << "Bypass {\n";
329 OS << " const unsigned NoBypass = 0;\n";
330 for (unsigned j = 0, BPN = BPs.size(); j < BPN; ++j)
331 OS << " const unsigned " << BPs[j]->getName()
332 << " = 1 << " << j << ";\n";
338 // Begin stages table
339 std::string StageTable = "\nstatic const llvm::InstrStage Stages[] = {\n";
340 StageTable += " { 0, 0, 0, llvm::InstrStage::Required }, // No itinerary\n";
342 // Begin operand cycle table
343 std::string OperandCycleTable = "static const unsigned OperandCycles[] = {\n";
344 OperandCycleTable += " 0, // No itinerary\n";
346 // Begin pipeline bypass table
347 std::string BypassTable = "static const unsigned ForwardingPathes[] = {\n";
348 BypassTable += " 0, // No itinerary\n";
350 unsigned StageCount = 1, OperandCycleCount = 1;
351 std::map<std::string, unsigned> ItinStageMap, ItinOperandMap;
352 for (unsigned i = 0, N = ProcItinList.size(); i < N; i++) {
354 Record *Proc = ProcItinList[i];
356 // Get processor itinerary name
357 const std::string &Name = Proc->getName();
360 if (Name == "NoItineraries") continue;
362 // Create and expand processor itinerary to cover all itinerary classes
363 std::vector<InstrItinerary> ItinList;
364 ItinList.resize(NItinClasses);
366 // Get itinerary data list
367 std::vector<Record*> ItinDataList = Proc->getValueAsListOfDefs("IID");
369 // For each itinerary data
370 for (unsigned j = 0, M = ItinDataList.size(); j < M; j++) {
371 // Next itinerary data
372 Record *ItinData = ItinDataList[j];
374 // Get string and stage count
375 std::string ItinStageString;
377 FormItineraryStageString(Name, ItinData, ItinStageString, NStages);
379 // Get string and operand cycle count
380 std::string ItinOperandCycleString;
381 unsigned NOperandCycles;
382 FormItineraryOperandCycleString(ItinData, ItinOperandCycleString,
385 std::string ItinBypassString;
386 FormItineraryBypassString(Name, ItinData, ItinBypassString,
389 // Check to see if stage already exists and create if it doesn't
390 unsigned FindStage = 0;
392 FindStage = ItinStageMap[ItinStageString];
393 if (FindStage == 0) {
394 // Emit as { cycles, u1 | u2 | ... | un, timeinc }, // indices
395 StageTable += ItinStageString + ", // " + itostr(StageCount);
397 StageTable += "-" + itostr(StageCount + NStages - 1);
399 // Record Itin class number.
400 ItinStageMap[ItinStageString] = FindStage = StageCount;
401 StageCount += NStages;
405 // Check to see if operand cycle already exists and create if it doesn't
406 unsigned FindOperandCycle = 0;
407 if (NOperandCycles > 0) {
408 std::string ItinOperandString = ItinOperandCycleString+ItinBypassString;
409 FindOperandCycle = ItinOperandMap[ItinOperandString];
410 if (FindOperandCycle == 0) {
411 // Emit as cycle, // index
412 OperandCycleTable += ItinOperandCycleString + ", // ";
413 std::string OperandIdxComment = itostr(OperandCycleCount);
414 if (NOperandCycles > 1)
415 OperandIdxComment += "-"
416 + itostr(OperandCycleCount + NOperandCycles - 1);
417 OperandCycleTable += OperandIdxComment + "\n";
418 // Record Itin class number.
419 ItinOperandMap[ItinOperandCycleString] =
420 FindOperandCycle = OperandCycleCount;
421 // Emit as bypass, // index
422 BypassTable += ItinBypassString + ", // " + OperandIdxComment + "\n";
423 OperandCycleCount += NOperandCycles;
427 // Locate where to inject into processor itinerary table
428 const std::string &Name = ItinData->getValueAsDef("TheClass")->getName();
429 unsigned Find = ItinClassesMap[Name];
431 // Set up itinerary as location and location + stage count
432 unsigned NumUOps = ItinClassList[Find]->getValueAsInt("NumMicroOps");
433 InstrItinerary Intinerary = { NumUOps, FindStage, FindStage + NStages,
435 FindOperandCycle + NOperandCycles};
437 // Inject - empty slots will be 0, 0
438 ItinList[Find] = Intinerary;
441 // Add process itinerary to list
442 ProcList.push_back(ItinList);
446 StageTable += " { 0, 0, 0, llvm::InstrStage::Required } // End itinerary\n";
447 StageTable += "};\n";
449 // Closing operand cycles
450 OperandCycleTable += " 0 // End itinerary\n";
451 OperandCycleTable += "};\n";
453 BypassTable += " 0 // End itinerary\n";
454 BypassTable += "};\n";
458 OS << OperandCycleTable;
461 // Emit size of tables
463 OS<<" StagesSize = sizeof(Stages)/sizeof(llvm::InstrStage),\n";
464 OS<<" OperandCyclesSize = sizeof(OperandCycles)/sizeof(unsigned)\n";
469 // EmitProcessorData - Generate data for processor itineraries.
471 void SubtargetEmitter::
472 EmitProcessorData(raw_ostream &OS,
473 std::vector<Record*> &ItinClassList,
474 std::vector<std::vector<InstrItinerary> > &ProcList) {
475 // Get an iterator for processor itinerary stages
476 std::vector<std::vector<InstrItinerary> >::iterator
477 ProcListIter = ProcList.begin();
479 // For each processor itinerary
480 std::vector<Record*> Itins =
481 Records.getAllDerivedDefinitions("ProcessorItineraries");
482 for (unsigned i = 0, N = Itins.size(); i < N; i++) {
484 Record *Itin = Itins[i];
486 // Get processor itinerary name
487 const std::string &Name = Itin->getName();
490 if (Name == "NoItineraries") continue;
492 // Begin processor itinerary table
494 OS << "static const llvm::InstrItinerary " << Name << "[] = {\n";
496 // For each itinerary class
497 std::vector<InstrItinerary> &ItinList = *ProcListIter++;
498 assert(ItinList.size() == ItinClassList.size() && "bad itinerary");
499 for (unsigned j = 0, M = ItinList.size(); j < M; ++j) {
500 InstrItinerary &Intinerary = ItinList[j];
502 // Emit in the form of
503 // { firstStage, lastStage, firstCycle, lastCycle } // index
504 if (Intinerary.FirstStage == 0) {
505 OS << " { 1, 0, 0, 0, 0 }";
508 Intinerary.NumMicroOps << ", " <<
509 Intinerary.FirstStage << ", " <<
510 Intinerary.LastStage << ", " <<
511 Intinerary.FirstOperandCycle << ", " <<
512 Intinerary.LastOperandCycle << " }";
515 OS << ", // " << j << " " << ItinClassList[j]->getName() << "\n";
518 // End processor itinerary table
519 OS << " { 1, ~0U, ~0U, ~0U, ~0U } // end marker\n";
525 // EmitProcessorLookup - generate cpu name to itinerary lookup table.
527 void SubtargetEmitter::EmitProcessorLookup(raw_ostream &OS) {
528 // Gather and sort processor information
529 std::vector<Record*> ProcessorList =
530 Records.getAllDerivedDefinitions("Processor");
531 std::sort(ProcessorList.begin(), ProcessorList.end(), LessRecordFieldName());
533 // Begin processor table
535 OS << "// Sorted (by key) array of itineraries for CPU subtype.\n"
536 << "static const llvm::SubtargetInfoKV ProcItinKV[] = {\n";
538 // For each processor
539 for (unsigned i = 0, N = ProcessorList.size(); i < N;) {
541 Record *Processor = ProcessorList[i];
543 const std::string &Name = Processor->getValueAsString("Name");
544 const std::string &ProcItin =
545 Processor->getValueAsDef("ProcItin")->getName();
547 // Emit as { "cpu", procinit },
549 << "\"" << Name << "\", "
550 << "(void *)&" << ProcItin;
554 // Depending on ''if more in the list'' emit comma
555 if (++i < N) OS << ",";
560 // End processor table
563 // Emit size of table
565 OS<<" ProcItinKVSize = sizeof(ProcItinKV)/"
566 "sizeof(llvm::SubtargetInfoKV)\n";
571 // EmitData - Emits all stages and itineries, folding common patterns.
573 void SubtargetEmitter::EmitData(raw_ostream &OS) {
574 std::map<std::string, unsigned> ItinClassesMap;
575 // Gather and sort all itinerary classes
576 std::vector<Record*> ItinClassList =
577 Records.getAllDerivedDefinitions("InstrItinClass");
578 std::sort(ItinClassList.begin(), ItinClassList.end(), LessRecord());
580 // Enumerate all the itinerary classes
581 unsigned NItinClasses = CollectAllItinClasses(OS, ItinClassesMap,
583 // Make sure the rest is worth the effort
584 HasItineraries = NItinClasses != 1; // Ignore NoItinerary.
586 if (HasItineraries) {
587 std::vector<std::vector<InstrItinerary> > ProcList;
588 // Emit the stage data
589 EmitStageAndOperandCycleData(OS, NItinClasses, ItinClassesMap,
590 ItinClassList, ProcList);
591 // Emit the processor itinerary data
592 EmitProcessorData(OS, ItinClassList, ProcList);
593 // Emit the processor lookup data
594 EmitProcessorLookup(OS);
599 // ParseFeaturesFunction - Produces a subtarget specific function for parsing
600 // the subtarget features string.
602 void SubtargetEmitter::ParseFeaturesFunction(raw_ostream &OS) {
603 std::vector<Record*> Features =
604 Records.getAllDerivedDefinitions("SubtargetFeature");
605 std::sort(Features.begin(), Features.end(), LessRecord());
607 OS << "// ParseSubtargetFeatures - Parses features string setting specified\n"
608 << "// subtarget options.\n"
609 << "std::string llvm::";
611 OS << "Subtarget::ParseSubtargetFeatures(const std::string &FS,\n"
612 << " const std::string &CPU) {\n"
613 << " DEBUG(dbgs() << \"\\nFeatures:\" << FS);\n"
614 << " DEBUG(dbgs() << \"\\nCPU:\" << CPU);\n"
615 << " SubtargetFeatures Features(FS);\n"
616 << " Features.setCPUIfNone(CPU);\n"
617 << " uint64_t Bits = Features.getBits(SubTypeKV, SubTypeKVSize,\n"
618 << " FeatureKV, FeatureKVSize);\n";
620 for (unsigned i = 0; i < Features.size(); i++) {
622 Record *R = Features[i];
623 const std::string &Instance = R->getName();
624 const std::string &Value = R->getValueAsString("Value");
625 const std::string &Attribute = R->getValueAsString("Attribute");
627 if (Value=="true" || Value=="false")
628 OS << " if ((Bits & " << Instance << ") != 0) "
629 << Attribute << " = " << Value << ";\n";
631 OS << " if ((Bits & " << Instance << ") != 0 && " << Attribute <<
632 " < " << Value << ") " << Attribute << " = " << Value << ";\n";
635 if (HasItineraries) {
637 << " InstrItinerary *Itinerary = (InstrItinerary *)"
638 << "Features.getInfo(ProcItinKV, ProcItinKVSize);\n"
639 << " InstrItins = InstrItineraryData(Stages, OperandCycles, "
640 << "ForwardingPathes, Itinerary);\n";
643 OS << " return Features.getCPU();\n"
648 // SubtargetEmitter::run - Main subtarget enumeration emitter.
650 void SubtargetEmitter::run(raw_ostream &OS) {
651 Target = CodeGenTarget(Records).getName();
653 EmitSourceFileHeader("Subtarget Enumeration Source Fragment", OS);
655 OS << "#include \"llvm/Support/Debug.h\"\n";
656 OS << "#include \"llvm/Support/raw_ostream.h\"\n";
657 OS << "#include \"llvm/Target/SubtargetFeature.h\"\n";
658 OS << "#include \"llvm/Target/TargetInstrItineraries.h\"\n\n";
660 // Enumeration(OS, "FuncUnit", true);
662 // Enumeration(OS, "InstrItinClass", false);
664 Enumeration(OS, "SubtargetFeature", true);
666 FeatureKeyValues(OS);
672 ParseFeaturesFunction(OS);