1 //===- X86DisassemblerTables.cpp - Disassembler tables ----------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file is part of the X86 Disassembler Emitter.
11 // It contains the implementation of the disassembler tables.
12 // Documentation for the disassembler emitter in general can be found in
13 // X86DisasemblerEmitter.h.
15 //===----------------------------------------------------------------------===//
17 #include "X86DisassemblerShared.h"
18 #include "X86DisassemblerTables.h"
20 #include "TableGenBackend.h"
21 #include "llvm/ADT/STLExtras.h"
22 #include "llvm/Support/ErrorHandling.h"
23 #include "llvm/Support/Format.h"
26 using namespace X86Disassembler;
28 /// inheritsFrom - Indicates whether all instructions in one class also belong
31 /// @param child - The class that may be the subset
32 /// @param parent - The class that may be the superset
33 /// @return - True if child is a subset of parent, false otherwise.
34 static inline bool inheritsFrom(InstructionContext child,
35 InstructionContext parent) {
43 return(inheritsFrom(child, IC_64BIT_REXW) ||
44 inheritsFrom(child, IC_64BIT_OPSIZE) ||
45 inheritsFrom(child, IC_64BIT_XD) ||
46 inheritsFrom(child, IC_64BIT_XS));
48 return(inheritsFrom(child, IC_64BIT_OPSIZE));
50 return(inheritsFrom(child, IC_64BIT_XD) ||
51 inheritsFrom(child, IC_VEX_XD));
53 return(inheritsFrom(child, IC_64BIT_XS) ||
54 inheritsFrom(child, IC_VEX_XS));
56 return(inheritsFrom(child, IC_64BIT_REXW_XS) ||
57 inheritsFrom(child, IC_64BIT_REXW_XD) ||
58 inheritsFrom(child, IC_64BIT_REXW_OPSIZE));
60 return(inheritsFrom(child, IC_64BIT_REXW_OPSIZE));
62 return(inheritsFrom(child, IC_64BIT_REXW_XD));
64 return(inheritsFrom(child, IC_64BIT_REXW_XS));
65 case IC_64BIT_REXW_XD:
67 case IC_64BIT_REXW_XS:
69 case IC_64BIT_REXW_OPSIZE:
72 return(inheritsFrom(child, IC_VEX_XS) ||
73 inheritsFrom(child, IC_VEX_XD) ||
74 inheritsFrom(child, IC_VEX_L) ||
75 inheritsFrom(child, IC_VEX_W) ||
76 inheritsFrom(child, IC_VEX_OPSIZE));
78 return(inheritsFrom(child, IC_VEX_L_XS) ||
79 inheritsFrom(child, IC_VEX_W_XS));
81 return(inheritsFrom(child, IC_VEX_L_XD) ||
82 inheritsFrom(child, IC_VEX_W_XD));
84 return(inheritsFrom(child, IC_VEX_L_XS) ||
85 inheritsFrom(child, IC_VEX_L_XD));
91 return(inheritsFrom(child, IC_VEX_W_XS) ||
92 inheritsFrom(child, IC_VEX_W_XD) ||
93 inheritsFrom(child, IC_VEX_W_OPSIZE));
99 return inheritsFrom(child, IC_VEX_W_OPSIZE);
105 /// outranks - Indicates whether, if an instruction has two different applicable
106 /// classes, which class should be preferred when performing decode. This
107 /// imposes a total ordering (ties are resolved toward "lower")
109 /// @param upper - The class that may be preferable
110 /// @param lower - The class that may be less preferable
111 /// @return - True if upper is to be preferred, false otherwise.
112 static inline bool outranks(InstructionContext upper,
113 InstructionContext lower) {
114 assert(upper < IC_max);
115 assert(lower < IC_max);
117 #define ENUM_ENTRY(n, r, d) r,
118 static int ranks[IC_max] = {
123 return (ranks[upper] > ranks[lower]);
126 /// stringForContext - Returns a string containing the name of a particular
127 /// InstructionContext, usually for diagnostic purposes.
129 /// @param insnContext - The instruction class to transform to a string.
130 /// @return - A statically-allocated string constant that contains the
131 /// name of the instruction class.
132 static inline const char* stringForContext(InstructionContext insnContext) {
133 switch (insnContext) {
135 llvm_unreachable("Unhandled instruction class");
136 #define ENUM_ENTRY(n, r, d) case n: return #n; break;
144 /// stringForOperandType - Like stringForContext, but for OperandTypes.
145 static inline const char* stringForOperandType(OperandType type) {
148 llvm_unreachable("Unhandled type");
149 #define ENUM_ENTRY(i, d) case i: return #i;
155 /// stringForOperandEncoding - like stringForContext, but for
156 /// OperandEncodings.
157 static inline const char* stringForOperandEncoding(OperandEncoding encoding) {
160 llvm_unreachable("Unhandled encoding");
161 #define ENUM_ENTRY(i, d) case i: return #i;
167 void DisassemblerTables::emitOneID(raw_ostream &o,
170 bool addComma) const {
172 o.indent(i * 2) << format("0x%hx", id);
174 o.indent(i * 2) << 0;
182 o << InstructionSpecifiers[id].name;
188 /// emitEmptyTable - Emits the modRMEmptyTable, which is used as a ID table by
189 /// all ModR/M decisions for instructions that are invalid for all possible
190 /// ModR/M byte values.
192 /// @param o - The output stream on which to emit the table.
193 /// @param i - The indentation level for that output stream.
194 static void emitEmptyTable(raw_ostream &o, uint32_t &i)
196 o.indent(i * 2) << "static const InstrUID modRMEmptyTable[1] = { 0 };\n";
200 /// getDecisionType - Determines whether a ModRM decision with 255 entries can
201 /// be compacted by eliminating redundant information.
203 /// @param decision - The decision to be compacted.
204 /// @return - The compactest available representation for the decision.
205 static ModRMDecisionType getDecisionType(ModRMDecision &decision)
207 bool satisfiesOneEntry = true;
208 bool satisfiesSplitRM = true;
212 for (index = 0; index < 256; ++index) {
213 if (decision.instructionIDs[index] != decision.instructionIDs[0])
214 satisfiesOneEntry = false;
216 if (((index & 0xc0) == 0xc0) &&
217 (decision.instructionIDs[index] != decision.instructionIDs[0xc0]))
218 satisfiesSplitRM = false;
220 if (((index & 0xc0) != 0xc0) &&
221 (decision.instructionIDs[index] != decision.instructionIDs[0x00]))
222 satisfiesSplitRM = false;
225 if (satisfiesOneEntry)
226 return MODRM_ONEENTRY;
228 if (satisfiesSplitRM)
229 return MODRM_SPLITRM;
234 /// stringForDecisionType - Returns a statically-allocated string corresponding
235 /// to a particular decision type.
237 /// @param dt - The decision type.
238 /// @return - A pointer to the statically-allocated string (e.g.,
239 /// "MODRM_ONEENTRY" for MODRM_ONEENTRY).
240 static const char* stringForDecisionType(ModRMDecisionType dt)
242 #define ENUM_ENTRY(n) case n: return #n;
245 llvm_unreachable("Unknown decision type");
251 /// stringForModifierType - Returns a statically-allocated string corresponding
252 /// to an opcode modifier type.
254 /// @param mt - The modifier type.
255 /// @return - A pointer to the statically-allocated string (e.g.,
256 /// "MODIFIER_NONE" for MODIFIER_NONE).
257 static const char* stringForModifierType(ModifierType mt)
259 #define ENUM_ENTRY(n) case n: return #n;
262 llvm_unreachable("Unknown modifier type");
268 DisassemblerTables::DisassemblerTables() {
271 for (i = 0; i < array_lengthof(Tables); i++) {
272 Tables[i] = new ContextDecision;
273 memset(Tables[i], 0, sizeof(ContextDecision));
276 HasConflicts = false;
279 DisassemblerTables::~DisassemblerTables() {
282 for (i = 0; i < array_lengthof(Tables); i++)
286 void DisassemblerTables::emitModRMDecision(raw_ostream &o1,
290 ModRMDecision &decision)
292 static uint64_t sTableNumber = 0;
293 uint64_t thisTableNumber = sTableNumber;
294 ModRMDecisionType dt = getDecisionType(decision);
297 if (dt == MODRM_ONEENTRY && decision.instructionIDs[0] == 0)
299 o2.indent(i2) << "{ /* ModRMDecision */" << "\n";
302 o2.indent(i2) << stringForDecisionType(dt) << "," << "\n";
303 o2.indent(i2) << "modRMEmptyTable";
306 o2.indent(i2) << "}";
310 o1.indent(i1) << "static const InstrUID modRMTable" << thisTableNumber;
314 llvm_unreachable("Unknown decision type");
326 o1 << " = {" << "\n";
331 llvm_unreachable("Unknown decision type");
333 emitOneID(o1, i1, decision.instructionIDs[0], false);
336 emitOneID(o1, i1, decision.instructionIDs[0x00], true); // mod = 0b00
337 emitOneID(o1, i1, decision.instructionIDs[0xc0], false); // mod = 0b11
340 for (index = 0; index < 256; ++index)
341 emitOneID(o1, i1, decision.instructionIDs[index], index < 255);
346 o1.indent(i1) << "};" << "\n";
349 o2.indent(i2) << "{ /* struct ModRMDecision */" << "\n";
352 o2.indent(i2) << stringForDecisionType(dt) << "," << "\n";
353 o2.indent(i2) << "modRMTable" << sTableNumber << "\n";
356 o2.indent(i2) << "}";
361 void DisassemblerTables::emitOpcodeDecision(
366 OpcodeDecision &decision) const {
369 o2.indent(i2) << "{ /* struct OpcodeDecision */" << "\n";
371 o2.indent(i2) << "{" << "\n";
374 for (index = 0; index < 256; ++index) {
377 o2 << "/* 0x" << format("%02hhx", index) << " */" << "\n";
379 emitModRMDecision(o1, o2, i1, i2, decision.modRMDecisions[index]);
388 o2.indent(i2) << "}" << "\n";
390 o2.indent(i2) << "}" << "\n";
393 void DisassemblerTables::emitContextDecision(
398 ContextDecision &decision,
399 const char* name) const {
400 o2.indent(i2) << "static const struct ContextDecision " << name << " = {\n";
402 o2.indent(i2) << "{ /* opcodeDecisions */" << "\n";
407 for (index = 0; index < IC_max; ++index) {
408 o2.indent(i2) << "/* ";
409 o2 << stringForContext((InstructionContext)index);
413 emitOpcodeDecision(o1, o2, i1, i2, decision.opcodeDecisions[index]);
415 if (index + 1 < IC_max)
420 o2.indent(i2) << "}" << "\n";
422 o2.indent(i2) << "};" << "\n";
425 void DisassemblerTables::emitInstructionInfo(raw_ostream &o, uint32_t &i)
427 o.indent(i * 2) << "static const struct InstructionSpecifier ";
428 o << INSTRUCTIONS_STR "[" << InstructionSpecifiers.size() << "] = {\n";
432 uint16_t numInstructions = InstructionSpecifiers.size();
433 uint16_t index, operandIndex;
435 for (index = 0; index < numInstructions; ++index) {
436 o.indent(i * 2) << "{ /* " << index << " */" << "\n";
440 stringForModifierType(InstructionSpecifiers[index].modifierType);
443 o.indent(i * 2) << "0x";
444 o << format("%02hhx", (uint16_t)InstructionSpecifiers[index].modifierBase);
447 o.indent(i * 2) << "{" << "\n";
450 for (operandIndex = 0; operandIndex < X86_MAX_OPERANDS; ++operandIndex) {
451 o.indent(i * 2) << "{ ";
452 o << stringForOperandEncoding(InstructionSpecifiers[index]
453 .operands[operandIndex]
456 o << stringForOperandType(InstructionSpecifiers[index]
457 .operands[operandIndex]
461 if (operandIndex < X86_MAX_OPERANDS - 1)
468 o.indent(i * 2) << "}," << "\n";
470 o.indent(i * 2) << "\"" << InstructionSpecifiers[index].name << "\"";
474 o.indent(i * 2) << "}";
476 if (index + 1 < numInstructions)
483 o.indent(i * 2) << "};" << "\n";
486 void DisassemblerTables::emitContextTable(raw_ostream &o, uint32_t &i) const {
489 o.indent(i * 2) << "static const InstructionContext " CONTEXTS_STR
493 for (index = 0; index < 256; ++index) {
496 if ((index & ATTR_VEXL) && (index & ATTR_OPSIZE))
497 o << "IC_VEX_L_OPSIZE";
498 else if ((index & ATTR_VEXL) && (index & ATTR_XD))
500 else if ((index & ATTR_VEXL) && (index & ATTR_XS))
502 else if ((index & ATTR_VEX) && (index & ATTR_REXW) && (index & ATTR_OPSIZE))
503 o << "IC_VEX_W_OPSIZE";
504 else if ((index & ATTR_VEX) && (index & ATTR_REXW) && (index & ATTR_XD))
506 else if ((index & ATTR_VEX) && (index & ATTR_REXW) && (index & ATTR_XS))
508 else if (index & ATTR_VEXL)
510 else if ((index & ATTR_VEX) && (index & ATTR_REXW))
512 else if ((index & ATTR_VEX) && (index & ATTR_OPSIZE))
513 o << "IC_VEX_OPSIZE";
514 else if ((index & ATTR_VEX) && (index & ATTR_XD))
516 else if ((index & ATTR_VEX) && (index & ATTR_XS))
518 else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && (index & ATTR_XS))
519 o << "IC_64BIT_REXW_XS";
520 else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && (index & ATTR_XD))
521 o << "IC_64BIT_REXW_XD";
522 else if ((index & ATTR_64BIT) && (index & ATTR_REXW) &&
523 (index & ATTR_OPSIZE))
524 o << "IC_64BIT_REXW_OPSIZE";
525 else if ((index & ATTR_64BIT) && (index & ATTR_XS))
527 else if ((index & ATTR_64BIT) && (index & ATTR_XD))
529 else if ((index & ATTR_64BIT) && (index & ATTR_OPSIZE))
530 o << "IC_64BIT_OPSIZE";
531 else if ((index & ATTR_64BIT) && (index & ATTR_REXW))
532 o << "IC_64BIT_REXW";
533 else if ((index & ATTR_64BIT))
535 else if (index & ATTR_XS)
537 else if (index & ATTR_XD)
539 else if (index & ATTR_OPSIZE)
541 else if (index & ATTR_VEX)
551 o << " /* " << index << " */";
557 o.indent(i * 2) << "};" << "\n";
560 void DisassemblerTables::emitContextDecisions(raw_ostream &o1,
565 emitContextDecision(o1, o2, i1, i2, *Tables[0], ONEBYTE_STR);
566 emitContextDecision(o1, o2, i1, i2, *Tables[1], TWOBYTE_STR);
567 emitContextDecision(o1, o2, i1, i2, *Tables[2], THREEBYTE38_STR);
568 emitContextDecision(o1, o2, i1, i2, *Tables[3], THREEBYTE3A_STR);
569 emitContextDecision(o1, o2, i1, i2, *Tables[4], THREEBYTEA6_STR);
570 emitContextDecision(o1, o2, i1, i2, *Tables[5], THREEBYTEA7_STR);
573 void DisassemblerTables::emit(raw_ostream &o) const {
580 raw_string_ostream o1(s1);
581 raw_string_ostream o2(s2);
583 emitInstructionInfo(o, i2);
586 emitContextTable(o, i2);
589 emitEmptyTable(o1, i1);
590 emitContextDecisions(o1, o2, i1, i2);
599 void DisassemblerTables::setTableFields(ModRMDecision &decision,
600 const ModRMFilter &filter,
605 for (index = 0; index < 256; ++index) {
606 if (filter.accepts(index)) {
607 if (decision.instructionIDs[index] == uid)
610 if (decision.instructionIDs[index] != 0) {
611 InstructionSpecifier &newInfo =
612 InstructionSpecifiers[uid];
613 InstructionSpecifier &previousInfo =
614 InstructionSpecifiers[decision.instructionIDs[index]];
617 continue; // filtered instructions get lowest priority
619 if(previousInfo.name == "NOOP")
620 continue; // special case for XCHG32ar and NOOP
622 if (outranks(previousInfo.insnContext, newInfo.insnContext))
625 if (previousInfo.insnContext == newInfo.insnContext &&
626 !previousInfo.filtered) {
627 errs() << "Error: Primary decode conflict: ";
628 errs() << newInfo.name << " would overwrite " << previousInfo.name;
630 errs() << "ModRM " << index << "\n";
631 errs() << "Opcode " << (uint16_t)opcode << "\n";
632 errs() << "Context " << stringForContext(newInfo.insnContext) << "\n";
637 decision.instructionIDs[index] = uid;
642 void DisassemblerTables::setTableFields(OpcodeType type,
643 InstructionContext insnContext,
645 const ModRMFilter &filter,
649 ContextDecision &decision = *Tables[type];
651 for (index = 0; index < IC_max; ++index) {
652 if (inheritsFrom((InstructionContext)index,
653 InstructionSpecifiers[uid].insnContext))
654 setTableFields(decision.opcodeDecisions[index].modRMDecisions[opcode],