1 //===- X86DisassemblerTables.cpp - Disassembler tables ----------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file is part of the X86 Disassembler Emitter.
11 // It contains the implementation of the disassembler tables.
12 // Documentation for the disassembler emitter in general can be found in
13 // X86DisasemblerEmitter.h.
15 //===----------------------------------------------------------------------===//
17 #include "X86DisassemblerShared.h"
18 #include "X86DisassemblerTables.h"
20 #include "TableGenBackend.h"
21 #include "llvm/ADT/STLExtras.h"
22 #include "llvm/Support/ErrorHandling.h"
23 #include "llvm/Support/Format.h"
26 using namespace X86Disassembler;
28 /// inheritsFrom - Indicates whether all instructions in one class also belong
31 /// @param child - The class that may be the subset
32 /// @param parent - The class that may be the superset
33 /// @return - True if child is a subset of parent, false otherwise.
34 static inline bool inheritsFrom(InstructionContext child,
35 InstructionContext parent) {
41 return(inheritsFrom(child, IC_64BIT) ||
42 inheritsFrom(child, IC_OPSIZE) ||
43 inheritsFrom(child, IC_XD) ||
44 inheritsFrom(child, IC_XS));
46 return(inheritsFrom(child, IC_64BIT_REXW) ||
47 inheritsFrom(child, IC_64BIT_OPSIZE) ||
48 inheritsFrom(child, IC_64BIT_XD) ||
49 inheritsFrom(child, IC_64BIT_XS));
51 return inheritsFrom(child, IC_64BIT_OPSIZE);
53 return inheritsFrom(child, IC_64BIT_XD);
55 return inheritsFrom(child, IC_64BIT_XS);
57 return(inheritsFrom(child, IC_64BIT_REXW_XS) ||
58 inheritsFrom(child, IC_64BIT_REXW_XD) ||
59 inheritsFrom(child, IC_64BIT_REXW_OPSIZE));
61 return(inheritsFrom(child, IC_64BIT_REXW_OPSIZE));
63 return(inheritsFrom(child, IC_64BIT_REXW_XD));
65 return(inheritsFrom(child, IC_64BIT_REXW_XS));
66 case IC_64BIT_REXW_XD:
68 case IC_64BIT_REXW_XS:
70 case IC_64BIT_REXW_OPSIZE:
73 return inheritsFrom(child, IC_VEX_W);
75 return inheritsFrom(child, IC_VEX_W_XS);
77 return inheritsFrom(child, IC_VEX_W_XD);
79 return inheritsFrom(child, IC_VEX_W_OPSIZE);
97 llvm_unreachable("Unknown instruction class");
102 /// outranks - Indicates whether, if an instruction has two different applicable
103 /// classes, which class should be preferred when performing decode. This
104 /// imposes a total ordering (ties are resolved toward "lower")
106 /// @param upper - The class that may be preferable
107 /// @param lower - The class that may be less preferable
108 /// @return - True if upper is to be preferred, false otherwise.
109 static inline bool outranks(InstructionContext upper,
110 InstructionContext lower) {
111 assert(upper < IC_max);
112 assert(lower < IC_max);
114 #define ENUM_ENTRY(n, r, d) r,
115 static int ranks[IC_max] = {
120 return (ranks[upper] > ranks[lower]);
123 /// stringForContext - Returns a string containing the name of a particular
124 /// InstructionContext, usually for diagnostic purposes.
126 /// @param insnContext - The instruction class to transform to a string.
127 /// @return - A statically-allocated string constant that contains the
128 /// name of the instruction class.
129 static inline const char* stringForContext(InstructionContext insnContext) {
130 switch (insnContext) {
132 llvm_unreachable("Unhandled instruction class");
133 #define ENUM_ENTRY(n, r, d) case n: return #n; break;
141 /// stringForOperandType - Like stringForContext, but for OperandTypes.
142 static inline const char* stringForOperandType(OperandType type) {
145 llvm_unreachable("Unhandled type");
146 #define ENUM_ENTRY(i, d) case i: return #i;
152 /// stringForOperandEncoding - like stringForContext, but for
153 /// OperandEncodings.
154 static inline const char* stringForOperandEncoding(OperandEncoding encoding) {
157 llvm_unreachable("Unhandled encoding");
158 #define ENUM_ENTRY(i, d) case i: return #i;
164 void DisassemblerTables::emitOneID(raw_ostream &o,
167 bool addComma) const {
169 o.indent(i * 2) << format("0x%hx", id);
171 o.indent(i * 2) << 0;
179 o << InstructionSpecifiers[id].name;
185 /// emitEmptyTable - Emits the modRMEmptyTable, which is used as a ID table by
186 /// all ModR/M decisions for instructions that are invalid for all possible
187 /// ModR/M byte values.
189 /// @param o - The output stream on which to emit the table.
190 /// @param i - The indentation level for that output stream.
191 static void emitEmptyTable(raw_ostream &o, uint32_t &i)
193 o.indent(i * 2) << "static const InstrUID modRMEmptyTable[1] = { 0 };\n";
197 /// getDecisionType - Determines whether a ModRM decision with 255 entries can
198 /// be compacted by eliminating redundant information.
200 /// @param decision - The decision to be compacted.
201 /// @return - The compactest available representation for the decision.
202 static ModRMDecisionType getDecisionType(ModRMDecision &decision)
204 bool satisfiesOneEntry = true;
205 bool satisfiesSplitRM = true;
209 for (index = 0; index < 256; ++index) {
210 if (decision.instructionIDs[index] != decision.instructionIDs[0])
211 satisfiesOneEntry = false;
213 if (((index & 0xc0) == 0xc0) &&
214 (decision.instructionIDs[index] != decision.instructionIDs[0xc0]))
215 satisfiesSplitRM = false;
217 if (((index & 0xc0) != 0xc0) &&
218 (decision.instructionIDs[index] != decision.instructionIDs[0x00]))
219 satisfiesSplitRM = false;
222 if (satisfiesOneEntry)
223 return MODRM_ONEENTRY;
225 if (satisfiesSplitRM)
226 return MODRM_SPLITRM;
231 /// stringForDecisionType - Returns a statically-allocated string corresponding
232 /// to a particular decision type.
234 /// @param dt - The decision type.
235 /// @return - A pointer to the statically-allocated string (e.g.,
236 /// "MODRM_ONEENTRY" for MODRM_ONEENTRY).
237 static const char* stringForDecisionType(ModRMDecisionType dt)
239 #define ENUM_ENTRY(n) case n: return #n;
242 llvm_unreachable("Unknown decision type");
248 /// stringForModifierType - Returns a statically-allocated string corresponding
249 /// to an opcode modifier type.
251 /// @param mt - The modifier type.
252 /// @return - A pointer to the statically-allocated string (e.g.,
253 /// "MODIFIER_NONE" for MODIFIER_NONE).
254 static const char* stringForModifierType(ModifierType mt)
256 #define ENUM_ENTRY(n) case n: return #n;
259 llvm_unreachable("Unknown modifier type");
265 DisassemblerTables::DisassemblerTables() {
268 for (i = 0; i < array_lengthof(Tables); i++) {
269 Tables[i] = new ContextDecision;
270 memset(Tables[i], 0, sizeof(ContextDecision));
273 HasConflicts = false;
276 DisassemblerTables::~DisassemblerTables() {
279 for (i = 0; i < array_lengthof(Tables); i++)
283 void DisassemblerTables::emitModRMDecision(raw_ostream &o1,
287 ModRMDecision &decision)
289 static uint64_t sTableNumber = 0;
290 uint64_t thisTableNumber = sTableNumber;
291 ModRMDecisionType dt = getDecisionType(decision);
294 if (dt == MODRM_ONEENTRY && decision.instructionIDs[0] == 0)
296 o2.indent(i2) << "{ /* ModRMDecision */" << "\n";
299 o2.indent(i2) << stringForDecisionType(dt) << "," << "\n";
300 o2.indent(i2) << "modRMEmptyTable";
303 o2.indent(i2) << "}";
307 o1.indent(i1) << "static const InstrUID modRMTable" << thisTableNumber;
311 llvm_unreachable("Unknown decision type");
323 o1 << " = {" << "\n";
328 llvm_unreachable("Unknown decision type");
330 emitOneID(o1, i1, decision.instructionIDs[0], false);
333 emitOneID(o1, i1, decision.instructionIDs[0x00], true); // mod = 0b00
334 emitOneID(o1, i1, decision.instructionIDs[0xc0], false); // mod = 0b11
337 for (index = 0; index < 256; ++index)
338 emitOneID(o1, i1, decision.instructionIDs[index], index < 255);
343 o1.indent(i1) << "};" << "\n";
346 o2.indent(i2) << "{ /* struct ModRMDecision */" << "\n";
349 o2.indent(i2) << stringForDecisionType(dt) << "," << "\n";
350 o2.indent(i2) << "modRMTable" << sTableNumber << "\n";
353 o2.indent(i2) << "}";
358 void DisassemblerTables::emitOpcodeDecision(
363 OpcodeDecision &decision) const {
366 o2.indent(i2) << "{ /* struct OpcodeDecision */" << "\n";
368 o2.indent(i2) << "{" << "\n";
371 for (index = 0; index < 256; ++index) {
374 o2 << "/* 0x" << format("%02hhx", index) << " */" << "\n";
376 emitModRMDecision(o1, o2, i1, i2, decision.modRMDecisions[index]);
385 o2.indent(i2) << "}" << "\n";
387 o2.indent(i2) << "}" << "\n";
390 void DisassemblerTables::emitContextDecision(
395 ContextDecision &decision,
396 const char* name) const {
397 o2.indent(i2) << "static const struct ContextDecision " << name << " = {\n";
399 o2.indent(i2) << "{ /* opcodeDecisions */" << "\n";
404 for (index = 0; index < IC_max; ++index) {
405 o2.indent(i2) << "/* ";
406 o2 << stringForContext((InstructionContext)index);
410 emitOpcodeDecision(o1, o2, i1, i2, decision.opcodeDecisions[index]);
412 if (index + 1 < IC_max)
417 o2.indent(i2) << "}" << "\n";
419 o2.indent(i2) << "};" << "\n";
422 void DisassemblerTables::emitInstructionInfo(raw_ostream &o, uint32_t &i)
424 o.indent(i * 2) << "static const struct InstructionSpecifier ";
425 o << INSTRUCTIONS_STR "[" << InstructionSpecifiers.size() << "] = {\n";
429 uint16_t numInstructions = InstructionSpecifiers.size();
430 uint16_t index, operandIndex;
432 for (index = 0; index < numInstructions; ++index) {
433 o.indent(i * 2) << "{ /* " << index << " */" << "\n";
437 stringForModifierType(InstructionSpecifiers[index].modifierType);
440 o.indent(i * 2) << "0x";
441 o << format("%02hhx", (uint16_t)InstructionSpecifiers[index].modifierBase);
444 o.indent(i * 2) << "{" << "\n";
447 for (operandIndex = 0; operandIndex < X86_MAX_OPERANDS; ++operandIndex) {
448 o.indent(i * 2) << "{ ";
449 o << stringForOperandEncoding(InstructionSpecifiers[index]
450 .operands[operandIndex]
453 o << stringForOperandType(InstructionSpecifiers[index]
454 .operands[operandIndex]
458 if (operandIndex < X86_MAX_OPERANDS - 1)
465 o.indent(i * 2) << "}," << "\n";
467 o.indent(i * 2) << "\"" << InstructionSpecifiers[index].name << "\"";
471 o.indent(i * 2) << "}";
473 if (index + 1 < numInstructions)
480 o.indent(i * 2) << "};" << "\n";
483 void DisassemblerTables::emitContextTable(raw_ostream &o, uint32_t &i) const {
486 o.indent(i * 2) << "static const InstructionContext " CONTEXTS_STR
490 for (index = 0; index < 256; ++index) {
493 if ((index & ATTR_VEXL) && (index & ATTR_OPSIZE))
494 o << "IC_VEX_L_OPSIZE";
495 else if ((index & ATTR_VEXL) && (index & ATTR_XD))
497 else if ((index & ATTR_VEXL) && (index & ATTR_XS))
499 else if ((index & ATTR_VEX) && (index & ATTR_REXW) && (index & ATTR_OPSIZE))
500 o << "IC_VEX_W_OPSIZE";
501 else if ((index & ATTR_VEX) && (index & ATTR_REXW) && (index & ATTR_XD))
503 else if ((index & ATTR_VEX) && (index & ATTR_REXW) && (index & ATTR_XS))
505 else if (index & ATTR_VEXL)
507 else if ((index & ATTR_VEX) && (index & ATTR_REXW))
509 else if ((index & ATTR_VEX) && (index & ATTR_OPSIZE))
510 o << "IC_VEX_OPSIZE";
511 else if ((index & ATTR_VEX) && (index & ATTR_XD))
513 else if ((index & ATTR_VEX) && (index & ATTR_XS))
515 else if (index & ATTR_VEX)
517 else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && (index & ATTR_XS))
518 o << "IC_64BIT_REXW_XS";
519 else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && (index & ATTR_XD))
520 o << "IC_64BIT_REXW_XD";
521 else if ((index & ATTR_64BIT) && (index & ATTR_REXW) &&
522 (index & ATTR_OPSIZE))
523 o << "IC_64BIT_REXW_OPSIZE";
524 else if ((index & ATTR_64BIT) && (index & ATTR_XS))
526 else if ((index & ATTR_64BIT) && (index & ATTR_XD))
528 else if ((index & ATTR_64BIT) && (index & ATTR_OPSIZE))
529 o << "IC_64BIT_OPSIZE";
530 else if ((index & ATTR_64BIT) && (index & ATTR_REXW))
531 o << "IC_64BIT_REXW";
532 else if ((index & ATTR_64BIT))
534 else if (index & ATTR_XS)
536 else if (index & ATTR_XD)
538 else if (index & ATTR_OPSIZE)
548 o << " /* " << index << " */";
554 o.indent(i * 2) << "};" << "\n";
557 void DisassemblerTables::emitContextDecisions(raw_ostream &o1,
562 emitContextDecision(o1, o2, i1, i2, *Tables[0], ONEBYTE_STR);
563 emitContextDecision(o1, o2, i1, i2, *Tables[1], TWOBYTE_STR);
564 emitContextDecision(o1, o2, i1, i2, *Tables[2], THREEBYTE38_STR);
565 emitContextDecision(o1, o2, i1, i2, *Tables[3], THREEBYTE3A_STR);
566 emitContextDecision(o1, o2, i1, i2, *Tables[4], THREEBYTEA6_STR);
567 emitContextDecision(o1, o2, i1, i2, *Tables[5], THREEBYTEA7_STR);
570 void DisassemblerTables::emit(raw_ostream &o) const {
577 raw_string_ostream o1(s1);
578 raw_string_ostream o2(s2);
580 emitInstructionInfo(o, i2);
583 emitContextTable(o, i2);
586 emitEmptyTable(o1, i1);
587 emitContextDecisions(o1, o2, i1, i2);
596 void DisassemblerTables::setTableFields(ModRMDecision &decision,
597 const ModRMFilter &filter,
602 for (index = 0; index < 256; ++index) {
603 if (filter.accepts(index)) {
604 if (decision.instructionIDs[index] == uid)
607 if (decision.instructionIDs[index] != 0) {
608 InstructionSpecifier &newInfo =
609 InstructionSpecifiers[uid];
610 InstructionSpecifier &previousInfo =
611 InstructionSpecifiers[decision.instructionIDs[index]];
614 continue; // filtered instructions get lowest priority
616 if(previousInfo.name == "NOOP")
617 continue; // special case for XCHG32ar and NOOP
619 if (outranks(previousInfo.insnContext, newInfo.insnContext))
622 if (previousInfo.insnContext == newInfo.insnContext &&
623 !previousInfo.filtered) {
624 errs() << "Error: Primary decode conflict: ";
625 errs() << newInfo.name << " would overwrite " << previousInfo.name;
627 errs() << "ModRM " << index << "\n";
628 errs() << "Opcode " << (uint16_t)opcode << "\n";
629 errs() << "Context " << stringForContext(newInfo.insnContext) << "\n";
634 decision.instructionIDs[index] = uid;
639 void DisassemblerTables::setTableFields(OpcodeType type,
640 InstructionContext insnContext,
642 const ModRMFilter &filter,
646 ContextDecision &decision = *Tables[type];
648 for (index = 0; index < IC_max; ++index) {
649 if (inheritsFrom((InstructionContext)index,
650 InstructionSpecifiers[uid].insnContext))
651 setTableFields(decision.opcodeDecisions[index].modRMDecisions[opcode],