3 # This creates a CSV file from the output of the debug output of subtarget:
4 # llvm-tblgen --gen-subtarget --debug-only=subtarget-emitter
5 # With thanks to Dave Estes for mentioning the idea at 2014 LLVM Developers' Meeting
16 def add(instr, model, resource=None):
19 entry = table.setdefault(instr, dict())
20 entry[model] = resource
26 return filt.search(m) != None
34 ordered_table = sorted(table.items(), key=operator.itemgetter(0))
35 ordered_models = filter(filter_model, sorted(models))
38 sys.stdout.write("instruction")
39 for model in ordered_models:
40 if not model: model = "default"
41 sys.stdout.write(", {}".format(model))
42 sys.stdout.write(os.linesep)
44 for (instr, mapping) in ordered_table:
45 sys.stdout.write(instr)
46 for model in ordered_models:
48 sys.stdout.write(", {}".format(mapping[model]))
50 sys.stdout.write(", ")
51 sys.stdout.write(os.linesep)
54 def machineModelCover(path):
55 # The interesting bits
56 re_sched_default = re.compile("SchedRW machine model for ([^ ]*) (.*)\n");
57 re_sched_no_default = re.compile("No machine model for ([^ ]*)\n");
58 re_sched_spec = re.compile("InstRW on ([^ ]*) for ([^ ]*) (.*)\n");
59 re_sched_no_spec = re.compile("No machine model for ([^ ]*) on processor (.*)\n");
62 with open(path, 'r') as f:
63 for line in f.readlines():
64 match = re_sched_default.match(line)
65 if match: add(match.group(1), None, match.group(2))
66 match = re_sched_no_default.match(line)
67 if match: add(match.group(1), None)
68 match = re_sched_spec.match(line)
69 if match: add(match.group(2), match.group(1), match.group(3))
70 match = re_sched_no_default.match(line)
71 if match: add(match.group(1), None)
76 filt = re.compile(sys.argv[2], re.IGNORECASE)
77 machineModelCover(sys.argv[1])