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Merge tag 'v3.10.59' into linux-linaro-lsk
[firefly-linux-kernel-4.4.55.git]
/
arch
/
arm
/
kvm
/
init.S
diff --git
a/arch/arm/kvm/init.S
b/arch/arm/kvm/init.S
index f048338135f7a5b20bf52371d03a3af0b922b68f..2cc14dfad04991fb2670e0c9469462b2951eacc9 100644
(file)
--- a/
arch/arm/kvm/init.S
+++ b/
arch/arm/kvm/init.S
@@
-71,7
+71,7
@@
__do_hyp_init:
bne phase2 @ Yes, second stage init
@ Set the HTTBR to point to the hypervisor PGD pointer passed
bne phase2 @ Yes, second stage init
@ Set the HTTBR to point to the hypervisor PGD pointer passed
- mcrr p15, 4, r
2, r3
, c2
+ mcrr p15, 4, r
r_lo_hi(r2, r3)
, c2
@ Set the HTCR and VTCR to the same shareability and cacheability
@ settings as the non-secure TTBCR and with T0SZ == 0.
@ Set the HTCR and VTCR to the same shareability and cacheability
@ settings as the non-secure TTBCR and with T0SZ == 0.
@@
-137,12
+137,12
@@
phase2:
mov pc, r0
target: @ We're now in the trampoline code, switch page tables
mov pc, r0
target: @ We're now in the trampoline code, switch page tables
- mcrr p15, 4, r
2, r3
, c2
+ mcrr p15, 4, r
r_lo_hi(r2, r3)
, c2
isb
@ Invalidate the old TLBs
mcr p15, 4, r0, c8, c7, 0 @ TLBIALLH
isb
@ Invalidate the old TLBs
mcr p15, 4, r0, c8, c7, 0 @ TLBIALLH
- dsb
+ dsb
ish
eret
eret