int err = -1;
printk("%s,line=%d\n", __func__,__LINE__);
int err = -1;
printk("%s,line=%d\n", __func__,__LINE__);
/*************set vdd11 (pll) voltage 1.0v********************/
val = tps65910_reg_read(tps65910, TPS65910_VDIG2);
if (val<0) {
/*************set vdd11 (pll) voltage 1.0v********************/
val = tps65910_reg_read(tps65910, TPS65910_VDIG2);
if (val<0) {
val = tps65910_reg_read(tps65910, TPS65910_DEVCTRL2);
if (val<0) {
printk(KERN_ERR "Unable to read TPS65910_DEVCTRL2 reg\n");
val = tps65910_reg_read(tps65910, TPS65910_DEVCTRL2);
if (val<0) {
printk(KERN_ERR "Unable to read TPS65910_DEVCTRL2 reg\n");
err = tps65910_reg_write(tps65910, TPS65910_VDD1, val);
if (err) {
printk(KERN_ERR "Unable to write TPS65910_VDD1 reg\n");
err = tps65910_reg_write(tps65910, TPS65910_VDD1, val);
if (err) {
printk(KERN_ERR "Unable to write TPS65910_VDD1 reg\n");
err = tps65910_reg_write(tps65910, TPS65910_VDD2, val);
if (err) {
printk(KERN_ERR "Unable to write TPS65910_VDD2 reg\n");
err = tps65910_reg_write(tps65910, TPS65910_VDD2, val);
if (err) {
printk(KERN_ERR "Unable to write TPS65910_VDD2 reg\n");
val = tps65910_reg_read(tps65910, TPS65910_DCDCCTRL);
if (val<0) {
printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
return val;
}
val = tps65910_reg_read(tps65910, TPS65910_DCDCCTRL);
if (val<0) {
printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
return val;
}
err = tps65910_reg_write(tps65910, TPS65910_DCDCCTRL, val);
if (err) {
printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
err = tps65910_reg_write(tps65910, TPS65910_DCDCCTRL, val);
if (err) {
printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
.valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
.valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
.valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
.valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
{
#ifdef CONFIG_CLK_SWITCH_TO_32K
sram_gpio_set_value(pmic_sleep, GPIO_LOW);
{
#ifdef CONFIG_CLK_SWITCH_TO_32K
sram_gpio_set_value(pmic_sleep, GPIO_LOW);