+#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) || \
+ defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE) \
+ || defined(CONFIG_SND_BF5XX_AC97) || \
+ defined(CONFIG_SND_BF5XX_AC97_MODULE)
+
+#include <asm/bfin_sport.h>
+
+#define SPORT_REQ(x) \
+ [x] = {P_SPORT##x##_TFS, P_SPORT##x##_DTPRI, P_SPORT##x##_TSCLK, \
+ P_SPORT##x##_RFS, P_SPORT##x##_DRPRI, P_SPORT##x##_RSCLK, 0}
+
+static const u16 bfin_snd_pin[][7] = {
+ SPORT_REQ(0),
+ SPORT_REQ(1),
+};
+
+static struct bfin_snd_platform_data bfin_snd_data[] = {
+ {
+ .pin_req = &bfin_snd_pin[0][0],
+ },
+ {
+ .pin_req = &bfin_snd_pin[1][0],
+ },
+};
+
+#define BFIN_SND_RES(x) \
+ [x] = { \
+ { \
+ .start = SPORT##x##_TCR1, \
+ .end = SPORT##x##_TCR1, \
+ .flags = IORESOURCE_MEM \
+ }, \
+ { \
+ .start = CH_SPORT##x##_RX, \
+ .end = CH_SPORT##x##_RX, \
+ .flags = IORESOURCE_DMA, \
+ }, \
+ { \
+ .start = CH_SPORT##x##_TX, \
+ .end = CH_SPORT##x##_TX, \
+ .flags = IORESOURCE_DMA, \
+ }, \
+ { \
+ .start = IRQ_SPORT##x##_ERROR, \
+ .end = IRQ_SPORT##x##_ERROR, \
+ .flags = IORESOURCE_IRQ, \
+ } \
+ }
+
+static struct resource bfin_snd_resources[][4] = {
+ BFIN_SND_RES(0),
+ BFIN_SND_RES(1),
+};
+#endif
+