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Merge git://git.kernel.org/pub/scm/linux/kernel/git/joern/logfs
[firefly-linux-kernel-4.4.55.git]
/
arch
/
mips
/
include
/
asm
/
mipsregs.h
diff --git
a/arch/mips/include/asm/mipsregs.h
b/arch/mips/include/asm/mipsregs.h
index 49382d5e891a35a98b09be21abcdb13366b2cca9..c6e3c93ce7c7a5aad8267d88f8c0089301d1e239 100644
(file)
--- a/
arch/mips/include/asm/mipsregs.h
+++ b/
arch/mips/include/asm/mipsregs.h
@@
-134,6
+134,12
@@
#define FPU_CSR_COND6 0x40000000 /* $fcc6 */
#define FPU_CSR_COND7 0x80000000 /* $fcc7 */
#define FPU_CSR_COND6 0x40000000 /* $fcc6 */
#define FPU_CSR_COND7 0x80000000 /* $fcc7 */
+/*
+ * Bits 18 - 20 of the FPU Status Register will be read as 0,
+ * and should be written as zero.
+ */
+#define FPU_CSR_RSVD 0x001c0000
+
/*
* X the exception cause indicator
* E the exception enable
/*
* X the exception cause indicator
* E the exception enable
@@
-161,7
+167,8
@@
#define FPU_CSR_UDF_S 0x00000008
#define FPU_CSR_INE_S 0x00000004
#define FPU_CSR_UDF_S 0x00000008
#define FPU_CSR_INE_S 0x00000004
-/* rounding mode */
+/* Bits 0 and 1 of FPU Status Register specify the rounding mode */
+#define FPU_CSR_RM 0x00000003
#define FPU_CSR_RN 0x0 /* nearest */
#define FPU_CSR_RZ 0x1 /* towards zero */
#define FPU_CSR_RU 0x2 /* towards +Infinity */
#define FPU_CSR_RN 0x0 /* nearest */
#define FPU_CSR_RZ 0x1 /* towards zero */
#define FPU_CSR_RU 0x2 /* towards +Infinity */