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ARM: Fix FIQ code on VIVT CPUs
[firefly-linux-kernel-4.4.55.git]
/
arch
/
sparc
/
mm
/
viking.S
diff --git
a/arch/sparc/mm/viking.S
b/arch/sparc/mm/viking.S
index bf8ee0613ae7efdb1bb6d6897bb42a11b7621b4b..852257fcc82b83c508bb738b31490d8694cef2dc 100644
(file)
--- a/
arch/sparc/mm/viking.S
+++ b/
arch/sparc/mm/viking.S
@@
-108,7
+108,7
@@
viking_mxcc_flush_page:
viking_flush_cache_page:
viking_flush_cache_range:
#ifndef CONFIG_SMP
viking_flush_cache_page:
viking_flush_cache_range:
#ifndef CONFIG_SMP
- ld [%o0 +
0x0], %o0 /* XXX vma->vm_mm, GROSS XXX */
+ ld [%o0 +
VMA_VM_MM], %o0
#endif
viking_flush_cache_mm:
#ifndef CONFIG_SMP
#endif
viking_flush_cache_mm:
#ifndef CONFIG_SMP
@@
-148,7
+148,7
@@
viking_flush_tlb_mm:
#endif
viking_flush_tlb_range:
#endif
viking_flush_tlb_range:
- ld [%o0 +
0x00], %o0 /* XXX vma->vm_mm GROSS XXX */
+ ld [%o0 +
VMA_VM_MM], %o0
mov SRMMU_CTX_REG, %g1
ld [%o0 + AOFF_mm_context], %o3
lda [%g1] ASI_M_MMUREGS, %g5
mov SRMMU_CTX_REG, %g1
ld [%o0 + AOFF_mm_context], %o3
lda [%g1] ASI_M_MMUREGS, %g5
@@
-173,7
+173,7
@@
viking_flush_tlb_range:
#endif
viking_flush_tlb_page:
#endif
viking_flush_tlb_page:
- ld [%o0 +
0x00], %o0 /* XXX vma->vm_mm GROSS XXX */
+ ld [%o0 +
VMA_VM_MM], %o0
mov SRMMU_CTX_REG, %g1
ld [%o0 + AOFF_mm_context], %o3
lda [%g1] ASI_M_MMUREGS, %g5
mov SRMMU_CTX_REG, %g1
ld [%o0 + AOFF_mm_context], %o3
lda [%g1] ASI_M_MMUREGS, %g5
@@
-239,7
+239,7
@@
sun4dsmp_flush_tlb_range:
tst %g5
bne 3f
mov SRMMU_CTX_REG, %g1
tst %g5
bne 3f
mov SRMMU_CTX_REG, %g1
- ld [%o0 +
0x00], %o0 /* XXX vma->vm_mm GROSS XXX */
+ ld [%o0 +
VMA_VM_MM], %o0
ld [%o0 + AOFF_mm_context], %o3
lda [%g1] ASI_M_MMUREGS, %g5
sethi %hi(~((1 << SRMMU_PGDIR_SHIFT) - 1)), %o4
ld [%o0 + AOFF_mm_context], %o3
lda [%g1] ASI_M_MMUREGS, %g5
sethi %hi(~((1 << SRMMU_PGDIR_SHIFT) - 1)), %o4
@@
-265,7
+265,7
@@
sun4dsmp_flush_tlb_page:
tst %g5
bne 2f
mov SRMMU_CTX_REG, %g1
tst %g5
bne 2f
mov SRMMU_CTX_REG, %g1
- ld [%o0 +
0x00], %o0 /* XXX vma->vm_mm GROSS XXX */
+ ld [%o0 +
VMA_VM_MM], %o0
ld [%o0 + AOFF_mm_context], %o3
lda [%g1] ASI_M_MMUREGS, %g5
and %o1, PAGE_MASK, %o1
ld [%o0 + AOFF_mm_context], %o3
lda [%g1] ASI_M_MMUREGS, %g5
and %o1, PAGE_MASK, %o1