-<p>Sometimes, mostly for debugging purposes, it is useful to change
-the number of physical registers available in the target
-architecture. This must be done statically, inside the
-<tt>TargetRegsterInfo.td</tt> file. Just <tt>grep</tt> for
-<tt>RegisterClass</tt>, the last parameter of which is a list of
-registers. Just commenting some out is one simple way to avoid them
-being used. A more polite way is to explicitly exclude some registers
-from the <i>allocation order</i>. See the definition of the
-<tt>GR</tt> register class in
-<tt>lib/Target/IA64/IA64RegisterInfo.td</tt> for an example of this
-(e.g., <tt>numReservedRegs</tt> registers are hidden.)</p>
-
-<p>Virtual registers are also denoted by integer numbers. Contrary to
-physical registers, different virtual registers never share the same
-number. The smallest virtual register is normally assigned the number
-1024. This may change, so, in order to know which is the first virtual
-register, you should access
-<tt>TargetRegisterInfo::FirstVirtualRegister</tt>. Any register whose
-number is greater than or equal to
-<tt>TargetRegisterInfo::FirstVirtualRegister</tt> is considered a virtual
-register. Whereas physical registers are statically defined in a
-<tt>TargetRegisterInfo.td</tt> file and cannot be created by the
-application developer, that is not the case with virtual registers.
-In order to create new virtual registers, use the method
-<tt>MachineRegisterInfo::createVirtualRegister()</tt>. This method will return a
-virtual register with the highest code.
-</p>
-
-<p>Before register allocation, the operands of an instruction are
-mostly virtual registers, although physical registers may also be
-used. In order to check if a given machine operand is a register, use
-the boolean function <tt>MachineOperand::isRegister()</tt>. To obtain
-the integer code of a register, use
-<tt>MachineOperand::getReg()</tt>. An instruction may define or use a
-register. For instance, <tt>ADD reg:1026 := reg:1025 reg:1024</tt>
-defines the registers 1024, and uses registers 1025 and 1026. Given a
-register operand, the method <tt>MachineOperand::isUse()</tt> informs
-if that register is being used by the instruction. The method
-<tt>MachineOperand::isDef()</tt> informs if that registers is being
-defined.</p>
-
-<p>We will call physical registers present in the LLVM bitcode before
-register allocation <i>pre-colored registers</i>. Pre-colored
-registers are used in many different situations, for instance, to pass
-parameters of functions calls, and to store results of particular
-instructions. There are two types of pre-colored registers: the ones
-<i>implicitly</i> defined, and those <i>explicitly</i>
-defined. Explicitly defined registers are normal operands, and can be
-accessed with <tt>MachineInstr::getOperand(int)::getReg()</tt>. In
-order to check which registers are implicitly defined by an
-instruction, use the
-<tt>TargetInstrInfo::get(opcode)::ImplicitDefs</tt>, where
-<tt>opcode</tt> is the opcode of the target instruction. One important
-difference between explicit and implicit physical registers is that
-the latter are defined statically for each instruction, whereas the
-former may vary depending on the program being compiled. For example,
-an instruction that represents a function call will always implicitly
-define or use the same set of physical registers. To read the
-registers implicitly used by an instruction, use
-<tt>TargetInstrInfo::get(opcode)::ImplicitUses</tt>. Pre-colored
-registers impose constraints on any register allocation algorithm. The
-register allocator must make sure that none of them is been
-overwritten by the values of virtual registers while still alive.</p>
+<p>Sometimes, mostly for debugging purposes, it is useful to change the number
+ of physical registers available in the target architecture. This must be done
+ statically, inside the <tt>TargetRegsterInfo.td</tt> file. Just <tt>grep</tt>
+ for <tt>RegisterClass</tt>, the last parameter of which is a list of
+ registers. Just commenting some out is one simple way to avoid them being
+ used. A more polite way is to explicitly exclude some registers from
+ the <i>allocation order</i>. See the definition of the <tt>GR8</tt> register
+ class in <tt>lib/Target/X86/X86RegisterInfo.td</tt> for an example of this.
+ </p>
+
+<p>Virtual registers are also denoted by integer numbers. Contrary to physical
+ registers, different virtual registers never share the same number. The
+ smallest virtual register is normally assigned the number 1024. This may
+ change, so, in order to know which is the first virtual register, you should
+ access <tt>TargetRegisterInfo::FirstVirtualRegister</tt>. Any register whose
+ number is greater than or equal
+ to <tt>TargetRegisterInfo::FirstVirtualRegister</tt> is considered a virtual
+ register. Whereas physical registers are statically defined in
+ a <tt>TargetRegisterInfo.td</tt> file and cannot be created by the
+ application developer, that is not the case with virtual registers. In order
+ to create new virtual registers, use the
+ method <tt>MachineRegisterInfo::createVirtualRegister()</tt>. This method
+ will return a virtual register with the highest code.</p>
+
+<p>Before register allocation, the operands of an instruction are mostly virtual
+ registers, although physical registers may also be used. In order to check if
+ a given machine operand is a register, use the boolean
+ function <tt>MachineOperand::isRegister()</tt>. To obtain the integer code of
+ a register, use <tt>MachineOperand::getReg()</tt>. An instruction may define
+ or use a register. For instance, <tt>ADD reg:1026 := reg:1025 reg:1024</tt>
+ defines the registers 1024, and uses registers 1025 and 1026. Given a
+ register operand, the method <tt>MachineOperand::isUse()</tt> informs if that
+ register is being used by the instruction. The
+ method <tt>MachineOperand::isDef()</tt> informs if that registers is being
+ defined.</p>
+
+<p>We will call physical registers present in the LLVM bitcode before register
+ allocation <i>pre-colored registers</i>. Pre-colored registers are used in
+ many different situations, for instance, to pass parameters of functions
+ calls, and to store results of particular instructions. There are two types
+ of pre-colored registers: the ones <i>implicitly</i> defined, and
+ those <i>explicitly</i> defined. Explicitly defined registers are normal
+ operands, and can be accessed
+ with <tt>MachineInstr::getOperand(int)::getReg()</tt>. In order to check
+ which registers are implicitly defined by an instruction, use
+ the <tt>TargetInstrInfo::get(opcode)::ImplicitDefs</tt>,
+ where <tt>opcode</tt> is the opcode of the target instruction. One important
+ difference between explicit and implicit physical registers is that the
+ latter are defined statically for each instruction, whereas the former may
+ vary depending on the program being compiled. For example, an instruction
+ that represents a function call will always implicitly define or use the same
+ set of physical registers. To read the registers implicitly used by an
+ instruction,
+ use <tt>TargetInstrInfo::get(opcode)::ImplicitUses</tt>. Pre-colored
+ registers impose constraints on any register allocation algorithm. The
+ register allocator must make sure that none of them are overwritten by
+ the values of virtual registers while still alive.</p>