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clk: rockchip: use rk3368-efuse clock ids
[firefly-linux-kernel-4.4.55.git]
/
drivers
/
clocksource
/
exynos_mct.c
diff --git
a/drivers/clocksource/exynos_mct.c
b/drivers/clocksource/exynos_mct.c
index 029f96ab131a20c5ff51ec9f6818f7053e6d4349..47f8aafe33441a6dbf5c34cd9e3a853833cef5dc 100644
(file)
--- a/
drivers/clocksource/exynos_mct.c
+++ b/
drivers/clocksource/exynos_mct.c
@@
-382,24
+382,28
@@
static void exynos4_mct_tick_start(unsigned long cycles,
static int exynos4_tick_set_next_event(unsigned long cycles,
struct clock_event_device *evt)
{
static int exynos4_tick_set_next_event(unsigned long cycles,
struct clock_event_device *evt)
{
- struct mct_clock_event_device *mevt
= this_cpu_ptr(&percpu_mct_tick)
;
+ struct mct_clock_event_device *mevt;
+ mevt = container_of(evt, struct mct_clock_event_device, evt);
exynos4_mct_tick_start(cycles, mevt);
exynos4_mct_tick_start(cycles, mevt);
-
return 0;
}
static int set_state_shutdown(struct clock_event_device *evt)
{
return 0;
}
static int set_state_shutdown(struct clock_event_device *evt)
{
- exynos4_mct_tick_stop(this_cpu_ptr(&percpu_mct_tick));
+ struct mct_clock_event_device *mevt;
+
+ mevt = container_of(evt, struct mct_clock_event_device, evt);
+ exynos4_mct_tick_stop(mevt);
return 0;
}
static int set_state_periodic(struct clock_event_device *evt)
{
return 0;
}
static int set_state_periodic(struct clock_event_device *evt)
{
- struct mct_clock_event_device *mevt
= this_cpu_ptr(&percpu_mct_tick)
;
+ struct mct_clock_event_device *mevt;
unsigned long cycles_per_jiffy;
unsigned long cycles_per_jiffy;
+ mevt = container_of(evt, struct mct_clock_event_device, evt);
cycles_per_jiffy = (((unsigned long long)NSEC_PER_SEC / HZ * evt->mult)
>> evt->shift);
exynos4_mct_tick_stop(mevt);
cycles_per_jiffy = (((unsigned long long)NSEC_PER_SEC / HZ * evt->mult)
>> evt->shift);
exynos4_mct_tick_stop(mevt);
@@
-478,6
+482,7
@@
static void exynos4_local_timer_stop(struct mct_clock_event_device *mevt)
if (mct_int_type == MCT_INT_SPI) {
if (evt->irq != -1)
disable_irq_nosync(evt->irq);
if (mct_int_type == MCT_INT_SPI) {
if (evt->irq != -1)
disable_irq_nosync(evt->irq);
+ exynos4_mct_write(0x1, mevt->base + MCT_L_INT_CSTAT_OFFSET);
} else {
disable_percpu_irq(mct_irqs[MCT_L0_IRQ]);
}
} else {
disable_percpu_irq(mct_irqs[MCT_L0_IRQ]);
}