-typedef enum sysmmu_register
-{
- SYSMMU_REGISTER_DTE_ADDR = 0x0000, /**< Current Page Directory Pointer */
- SYSMMU_REGISTER_STATUS = 0x0004, /**< Status of the MMU */
- SYSMMU_REGISTER_COMMAND = 0x0008, /**< Command register, used to control the MMU */
- SYSMMU_REGISTER_PAGE_FAULT_ADDR = 0x000C, /**< Logical address of the last page fault */
- SYSMMU_REGISTER_ZAP_ONE_LINE = 0x010, /**< Used to invalidate the mapping of a single page from the MMU */
- SYSMMU_REGISTER_INT_RAWSTAT = 0x0014, /**< Raw interrupt status, all interrupts visible */
- SYSMMU_REGISTER_INT_CLEAR = 0x0018, /**< Indicate to the MMU that the interrupt has been received */
- SYSMMU_REGISTER_INT_MASK = 0x001C, /**< Enable/disable types of interrupts */
- SYSMMU_REGISTER_INT_STATUS = 0x0020, /**< Interrupt status based on the mask */
- SYSMMU_REGISTER_AUTO_GATING = 0x0024
-} sysmmu_register;
-
-typedef enum sysmmu_command
-{
- SYSMMU_COMMAND_ENABLE_PAGING = 0x00, /**< Enable paging (memory translation) */
- SYSMMU_COMMAND_DISABLE_PAGING = 0x01, /**< Disable paging (memory translation) */
- SYSMMU_COMMAND_ENABLE_STALL = 0x02, /**< Enable stall on page fault */
- SYSMMU_COMMAND_DISABLE_STALL = 0x03, /**< Disable stall on page fault */
- SYSMMU_COMMAND_ZAP_CACHE = 0x04, /**< Zap the entire page table cache */
- SYSMMU_COMMAND_PAGE_FAULT_DONE = 0x05, /**< Page fault processed */
- SYSMMU_COMMAND_HARD_RESET = 0x06 /**< Reset the MMU back to power-on settings */
-} sysmmu_command;
+enum iommu_register {
+ /**< Current Page Directory Pointer */
+ IOMMU_REGISTER_DTE_ADDR = 0x0000,
+ /**< Status of the MMU */
+ IOMMU_REGISTER_STATUS = 0x0004,
+ /**< Command register, used to control the MMU */
+ IOMMU_REGISTER_COMMAND = 0x0008,
+ /**< Logical address of the last page fault */
+ IOMMU_REGISTER_PAGE_FAULT_ADDR = 0x000C,
+ /**< Used to invalidate the mapping of a single page from the MMU */
+ IOMMU_REGISTER_ZAP_ONE_LINE = 0x010,
+ /**< Raw interrupt status, all interrupts visible */
+ IOMMU_REGISTER_INT_RAWSTAT = 0x0014,
+ /**< Indicate to the MMU that the interrupt has been received */
+ IOMMU_REGISTER_INT_CLEAR = 0x0018,
+ /**< Enable/disable types of interrupts */
+ IOMMU_REGISTER_INT_MASK = 0x001C,
+ /**< Interrupt status based on the mask */
+ IOMMU_REGISTER_INT_STATUS = 0x0020,
+ IOMMU_REGISTER_AUTO_GATING = 0x0024
+};
+
+enum iommu_command {
+ /**< Enable paging (memory translation) */
+ IOMMU_COMMAND_ENABLE_PAGING = 0x00,
+ /**< Disable paging (memory translation) */
+ IOMMU_COMMAND_DISABLE_PAGING = 0x01,
+ /**< Enable stall on page fault */
+ IOMMU_COMMAND_ENABLE_STALL = 0x02,
+ /**< Disable stall on page fault */
+ IOMMU_COMMAND_DISABLE_STALL = 0x03,
+ /**< Zap the entire page table cache */
+ IOMMU_COMMAND_ZAP_CACHE = 0x04,
+ /**< Page fault processed */
+ IOMMU_COMMAND_PAGE_FAULT_DONE = 0x05,
+ /**< Reset the MMU back to power-on settings */
+ IOMMU_COMMAND_HARD_RESET = 0x06
+};