+#define H5V_EN_MASK BIT(0)
+#define H5V_EN_ENABLE BIT(0)
+#define REF_RDY_CTRL_MASK BIT(1)
+#define REF_RDY_CTRL_ENABLE BIT(1)
+
+/*RK818_DCDC_EN_REG*/
+#define BUCK1_EN_MASK BIT(0)
+#define BUCK2_EN_MASK BIT(1)
+#define BUCK3_EN_MASK BIT(2)
+#define BUCK4_EN_MASK BIT(3)
+#define BOOST_EN_MASK BIT(4)
+#define LDO9_EN_MASK BIT(5)
+#define SWITCH_EN_MASK BIT(6)
+#define OTG_EN_MASK BIT(7)
+
+#define BUCK1_EN_ENABLE BIT(0)
+#define BUCK2_EN_ENABLE BIT(1)
+#define BUCK3_EN_ENABLE BIT(2)
+#define BUCK4_EN_ENABLE BIT(3)
+#define BOOST_EN_ENABLE BIT(4)
+#define LDO9_EN_ENABLE BIT(5)
+#define SWITCH_EN_ENABLE BIT(6)
+#define OTG_EN_ENABLE BIT(7)
+
+/* IRQ Definitions */
+#define RK818_IRQ_VOUT_LO 0
+#define RK818_IRQ_VB_LO 1
+#define RK818_IRQ_PWRON 2
+#define RK818_IRQ_PWRON_LP 3
+#define RK818_IRQ_HOTDIE 4
+#define RK818_IRQ_RTC_ALARM 5
+#define RK818_IRQ_RTC_PERIOD 6
+#define RK818_IRQ_USB_OV 7
+#define RK818_IRQ_PLUG_IN 8
+#define RK818_IRQ_PLUG_OUT 9
+#define RK818_IRQ_CHG_OK 10
+#define RK818_IRQ_CHG_TE 11
+#define RK818_IRQ_CHG_TS1 12
+#define RK818_IRQ_TS2 13
+#define RK818_IRQ_CHG_CVTLIM 14
+#define RK818_IRQ_DISCHG_ILIM 15
+
+#define BUCK1_SLP_SET_MASK BIT(0)
+#define BUCK2_SLP_SET_MASK BIT(1)
+#define BUCK3_SLP_SET_MASK BIT(2)
+#define BUCK4_SLP_SET_MASK BIT(3)
+#define BOOST_SLP_SET_MASK BIT(4)
+#define LDO9_SLP_SET_MASK BIT(5)
+#define SWITCH_SLP_SET_MASK BIT(6)
+#define OTG_SLP_SET_MASK BIT(7)
+
+#define BUCK1_SLP_SET_OFF BIT(0)
+#define BUCK2_SLP_SET_OFF BIT(1)
+#define BUCK3_SLP_SET_OFF BIT(2)
+#define BUCK4_SLP_SET_OFF BIT(3)
+#define BOOST_SLP_SET_OFF BIT(4)
+#define LDO9_SLP_SET_OFF BIT(5)
+#define SWITCH_SLP_SET_OFF BIT(6)
+#define OTG_SLP_SET_OFF BIT(7)
+
+#define BUCK1_SLP_SET_ON BIT(0)
+#define BUCK2_SLP_SET_ON BIT(1)
+#define BUCK3_SLP_SET_ON BIT(2)
+#define BUCK4_SLP_SET_ON BIT(3)
+#define BOOST_SLP_SET_ON BIT(4)
+#define LDO9_SLP_SET_ON BIT(5)
+#define SWITCH_SLP_SET_ON BIT(6)
+#define OTG_SLP_SET_ON BIT(7)
+
+#define VOUT_LO_MASK BIT(0)
+#define VB_LO_MASK BIT(1)
+#define PWRON_MASK BIT(2)
+#define PWRON_LP_MASK BIT(3)
+#define HOTDIE_MASK BIT(4)
+#define RTC_ALARM_MASK BIT(5)
+#define RTC_PERIOD_MASK BIT(6)
+#define USB_OV_MASK BIT(7)
+
+#define VOUT_LO_DISABLE BIT(0)
+#define VB_LO_DISABLE BIT(1)
+#define PWRON_DISABLE BIT(2)
+#define PWRON_LP_DISABLE BIT(3)
+#define HOTDIE_DISABLE BIT(4)
+#define RTC_ALARM_DISABLE BIT(5)
+#define RTC_PERIOD_DISABLE BIT(6)
+#define USB_OV_INT_DISABLE BIT(7)
+
+#define VOUT_LO_ENABLE (0 << 0)
+#define VB_LO_ENABLE (0 << 1)
+#define PWRON_ENABLE (0 << 2)
+#define PWRON_LP_ENABLE (0 << 3)
+#define HOTDIE_ENABLE (0 << 4)
+#define RTC_ALARM_ENABLE (0 << 5)
+#define RTC_PERIOD_ENABLE (0 << 6)
+#define USB_OV_INT_ENABLE (0 << 7)
+
+#define PLUG_IN_MASK BIT(0)
+#define PLUG_OUT_MASK BIT(1)
+#define CHGOK_MASK BIT(2)
+#define CHGTE_MASK BIT(3)
+#define CHGTS1_MASK BIT(4)
+#define TS2_MASK BIT(5)
+#define CHG_CVTLIM_MASK BIT(6)
+#define DISCHG_ILIM_MASK BIT(7)
+
+#define PLUG_IN_DISABLE BIT(0)
+#define PLUG_OUT_DISABLE BIT(1)
+#define CHGOK_DISABLE BIT(2)
+#define CHGTE_DISABLE BIT(3)
+#define CHGTS1_DISABLE BIT(4)
+#define TS2_DISABLE BIT(5)
+#define CHG_CVTLIM_DISABLE BIT(6)
+#define DISCHG_ILIM_DISABLE BIT(7)
+
+#define PLUG_IN_ENABLE BIT(0)
+#define PLUG_OUT_ENABLE BIT(1)
+#define CHGOK_ENABLE BIT(2)
+#define CHGTE_ENABLE BIT(3)
+#define CHGTS1_ENABLE BIT(4)
+#define TS2_ENABLE BIT(5)
+#define CHG_CVTLIM_ENABLE BIT(6)
+#define DISCHG_ILIM_ENABLE BIT(7)