+ /// OpKind - Specify what kind of operand this is. This discriminates the
+ /// union.
+ unsigned char OpKind; // MachineOperandType
+
+ // This union is discriminated by OpKind.
+ union {
+ /// SubReg - Subregister number, only valid for MO_Register. A value of 0
+ /// indicates the MO_Register has no subReg.
+ unsigned char SubReg;
+
+ /// TargetFlags - This is a set of target-specific operand flags.
+ unsigned char TargetFlags;
+ };
+
+ /// TiedTo - Non-zero when this register operand is tied to another register
+ /// operand. The encoding of this field is described in the block comment
+ /// before MachineInstr::tieOperands().
+ unsigned char TiedTo : 4;
+
+ /// IsDef/IsImp/IsKill/IsDead flags - These are only valid for MO_Register
+ /// operands.
+
+ /// IsDef - True if this is a def, false if this is a use of the register.
+ ///
+ bool IsDef : 1;
+
+ /// IsImp - True if this is an implicit def or use, false if it is explicit.
+ ///
+ bool IsImp : 1;
+
+ /// IsKill - True if this instruction is the last use of the register on this
+ /// path through the function. This is only valid on uses of registers.
+ bool IsKill : 1;
+
+ /// IsDead - True if this register is never used by a subsequent instruction.
+ /// This is only valid on definitions of registers.
+ bool IsDead : 1;
+
+ /// IsUndef - True if this register operand reads an "undef" value, i.e. the
+ /// read value doesn't matter. This flag can be set on both use and def
+ /// operands. On a sub-register def operand, it refers to the part of the
+ /// register that isn't written. On a full-register def operand, it is a
+ /// noop. See readsReg().
+ ///
+ /// This is only valid on registers.
+ ///
+ /// Note that an instruction may have multiple <undef> operands referring to
+ /// the same register. In that case, the instruction may depend on those
+ /// operands reading the same dont-care value. For example:
+ ///
+ /// %vreg1<def> = XOR %vreg2<undef>, %vreg2<undef>
+ ///
+ /// Any register can be used for %vreg2, and its value doesn't matter, but
+ /// the two operands must be the same register.
+ ///
+ bool IsUndef : 1;
+
+ /// IsInternalRead - True if this operand reads a value that was defined
+ /// inside the same instruction or bundle. This flag can be set on both use
+ /// and def operands. On a sub-register def operand, it refers to the part
+ /// of the register that isn't written. On a full-register def operand, it
+ /// is a noop.
+ ///
+ /// When this flag is set, the instruction bundle must contain at least one
+ /// other def of the register. If multiple instructions in the bundle define
+ /// the register, the meaning is target-defined.
+ bool IsInternalRead : 1;
+
+ /// IsEarlyClobber - True if this MO_Register 'def' operand is written to
+ /// by the MachineInstr before all input registers are read. This is used to
+ /// model the GCC inline asm '&' constraint modifier.
+ bool IsEarlyClobber : 1;
+
+ /// IsDebug - True if this MO_Register 'use' operand is in a debug pseudo,
+ /// not a real instruction. Such uses should be ignored during codegen.
+ bool IsDebug : 1;
+
+ /// SmallContents - This really should be part of the Contents union, but
+ /// lives out here so we can get a better packed struct.
+ /// MO_Register: Register number.
+ /// OffsetedInfo: Low bits of offset.