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Another test commit. Remove trailing whitespace.
[oota-llvm.git]
/
include
/
llvm
/
CodeGen
/
SchedulerRegistry.h
diff --git
a/include/llvm/CodeGen/SchedulerRegistry.h
b/include/llvm/CodeGen/SchedulerRegistry.h
index a582b0c40c8bb94215c0ff9eebb8e020c9643204..51ac7f28527f75b8afdfc797d5969997dce1840f 100644
(file)
--- a/
include/llvm/CodeGen/SchedulerRegistry.h
+++ b/
include/llvm/CodeGen/SchedulerRegistry.h
@@
-12,8
+12,8
@@
//
//===----------------------------------------------------------------------===//
//
//===----------------------------------------------------------------------===//
-#ifndef LLVM_CODEGENSCHEDULERREGISTRY_H
-#define LLVM_CODEGENSCHEDULERREGISTRY_H
+#ifndef LLVM_CODEGEN
_
SCHEDULERREGISTRY_H
+#define LLVM_CODEGEN
_
SCHEDULERREGISTRY_H
#include "llvm/CodeGen/MachinePassRegistry.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/CodeGen/MachinePassRegistry.h"
#include "llvm/Target/TargetMachine.h"
@@
-102,6
+102,11
@@
ScheduleDAGSDNodes *createVLIWDAGScheduler(SelectionDAGISel *IS,
ScheduleDAGSDNodes *createDefaultScheduler(SelectionDAGISel *IS,
CodeGenOpt::Level OptLevel);
ScheduleDAGSDNodes *createDefaultScheduler(SelectionDAGISel *IS,
CodeGenOpt::Level OptLevel);
+/// createDAGLinearizer - This creates a "no-scheduling" scheduler which
+/// linearize the DAG using topological order.
+ScheduleDAGSDNodes *createDAGLinearizer(SelectionDAGISel *IS,
+ CodeGenOpt::Level OptLevel);
+
} // end namespace llvm
#endif
} // end namespace llvm
#endif