- def int_arm_neon_vst1i : Intrinsic<[llvm_void_ty],
- [llvm_ptr_ty, llvm_anyint_ty],
- [IntrWriteArgMem]>;
- def int_arm_neon_vst1f : Intrinsic<[llvm_void_ty],
- [llvm_ptr_ty, llvm_anyfloat_ty],
- [IntrWriteArgMem]>;
- def int_arm_neon_vst2i : Intrinsic<[llvm_void_ty],
- [llvm_ptr_ty, llvm_anyint_ty,
- LLVMMatchType<0>], [IntrWriteArgMem]>;
- def int_arm_neon_vst2f : Intrinsic<[llvm_void_ty],
- [llvm_ptr_ty, llvm_anyfloat_ty,
- LLVMMatchType<0>], [IntrWriteArgMem]>;
- def int_arm_neon_vst3i : Intrinsic<[llvm_void_ty],
- [llvm_ptr_ty, llvm_anyint_ty,
- LLVMMatchType<0>, LLVMMatchType<0>],
- [IntrWriteArgMem]>;
- def int_arm_neon_vst3f : Intrinsic<[llvm_void_ty],
- [llvm_ptr_ty, llvm_anyfloat_ty,
- LLVMMatchType<0>, LLVMMatchType<0>],
- [IntrWriteArgMem]>;
- def int_arm_neon_vst4i : Intrinsic<[llvm_void_ty],
- [llvm_ptr_ty, llvm_anyint_ty,
- LLVMMatchType<0>, LLVMMatchType<0>,
- LLVMMatchType<0>], [IntrWriteArgMem]>;
- def int_arm_neon_vst4f : Intrinsic<[llvm_void_ty],
- [llvm_ptr_ty, llvm_anyfloat_ty,
- LLVMMatchType<0>, LLVMMatchType<0>,
- LLVMMatchType<0>], [IntrWriteArgMem]>;
-
- // Vector Table Lookup
- def int_arm_neon_vtbl : Intrinsic<[llvm_v8i8_ty],
- [llvm_anyint_ty, llvm_v8i8_ty],
- [IntrNoMem]>;
- // Vector Table Extension
- def int_arm_neon_vtbx : Intrinsic<[llvm_v8i8_ty],
- [llvm_v8i8_ty, llvm_anyint_ty,
- llvm_v8i8_ty], [IntrNoMem]>;
+ // Source operands are: the address, the N vectors, and the alignment.
+ def int_arm_neon_vst1 : Intrinsic<[],
+ [llvm_ptr_ty, llvm_anyvector_ty,
+ llvm_i32_ty], [IntrReadWriteArgMem]>;
+ def int_arm_neon_vst2 : Intrinsic<[],
+ [llvm_ptr_ty, llvm_anyvector_ty,
+ LLVMMatchType<0>, llvm_i32_ty],
+ [IntrReadWriteArgMem]>;
+ def int_arm_neon_vst3 : Intrinsic<[],
+ [llvm_ptr_ty, llvm_anyvector_ty,
+ LLVMMatchType<0>, LLVMMatchType<0>,
+ llvm_i32_ty], [IntrReadWriteArgMem]>;
+ def int_arm_neon_vst4 : Intrinsic<[],
+ [llvm_ptr_ty, llvm_anyvector_ty,
+ LLVMMatchType<0>, LLVMMatchType<0>,
+ LLVMMatchType<0>, llvm_i32_ty],
+ [IntrReadWriteArgMem]>;
+
+ // Vector store N-element structure from one lane.
+ // Source operands are: the address, the N vectors, the lane number, and
+ // the alignment.
+ def int_arm_neon_vst2lane : Intrinsic<[],
+ [llvm_ptr_ty, llvm_anyvector_ty,
+ LLVMMatchType<0>, llvm_i32_ty,
+ llvm_i32_ty], [IntrReadWriteArgMem]>;
+ def int_arm_neon_vst3lane : Intrinsic<[],
+ [llvm_ptr_ty, llvm_anyvector_ty,
+ LLVMMatchType<0>, LLVMMatchType<0>,
+ llvm_i32_ty, llvm_i32_ty],
+ [IntrReadWriteArgMem]>;
+ def int_arm_neon_vst4lane : Intrinsic<[],
+ [llvm_ptr_ty, llvm_anyvector_ty,
+ LLVMMatchType<0>, LLVMMatchType<0>,
+ LLVMMatchType<0>, llvm_i32_ty,
+ llvm_i32_ty], [IntrReadWriteArgMem]>;