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Make llvm-objdump handle both arm and thumb disassembly from the same Mach-O
[oota-llvm.git]
/
lib
/
CodeGen
/
AllocationOrder.cpp
diff --git
a/lib/CodeGen/AllocationOrder.cpp
b/lib/CodeGen/AllocationOrder.cpp
index 1d09d20f031e62ae8a759b5119cdb5ceded0cc34..dc9bcff56121df781682186dfb86c307c8762288 100644
(file)
--- a/
lib/CodeGen/AllocationOrder.cpp
+++ b/
lib/CodeGen/AllocationOrder.cpp
@@
-14,7
+14,6
@@
//
//===----------------------------------------------------------------------===//
//
//===----------------------------------------------------------------------===//
-#define DEBUG_TYPE "regalloc"
#include "AllocationOrder.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "AllocationOrder.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
@@
-25,6
+24,8
@@
using namespace llvm;
using namespace llvm;
+#define DEBUG_TYPE "regalloc"
+
// Compare VirtRegMap::getRegAllocPref().
AllocationOrder::AllocationOrder(unsigned VirtReg,
const VirtRegMap &VRM,
// Compare VirtRegMap::getRegAllocPref().
AllocationOrder::AllocationOrder(unsigned VirtReg,
const VirtRegMap &VRM,
@@
-44,4
+45,9
@@
AllocationOrder::AllocationOrder(unsigned VirtReg,
dbgs() << '\n';
}
});
dbgs() << '\n';
}
});
+#ifndef NDEBUG
+ for (unsigned I = 0, E = Hints.size(); I != E; ++I)
+ assert(std::find(Order.begin(), Order.end(), Hints[I]) != Order.end() &&
+ "Target hint is outside allocation order.");
+#endif
}
}