+/// Emit a dwarf register operation.
+static void emitDwarfRegOp(const AsmPrinter &AP, int Reg) {
+ assert(Reg >= 0);
+ if (Reg < 32) {
+ AP.OutStreamer.AddComment(dwarf::
+ OperationEncodingString(dwarf::DW_OP_reg0 + Reg));
+ AP.EmitInt8(dwarf::DW_OP_reg0 + Reg);
+ } else {
+ AP.OutStreamer.AddComment("DW_OP_regx");
+ AP.EmitInt8(dwarf::DW_OP_regx);
+ AP.OutStreamer.AddComment(Twine(Reg));
+ AP.EmitULEB128(Reg);
+ }
+}
+
+/// Emit an (double-)indirect dwarf register operation.
+static void emitDwarfRegOpIndirect(const AsmPrinter &AP,
+ int Reg, int Offset, bool Deref) {
+ assert(Reg >= 0);
+ if (Reg < 32) {
+ AP.OutStreamer.AddComment(dwarf::
+ OperationEncodingString(dwarf::DW_OP_breg0 + Reg));
+ AP.EmitInt8(dwarf::DW_OP_breg0 + Reg);
+ } else {
+ AP.OutStreamer.AddComment("DW_OP_bregx");
+ AP.EmitInt8(dwarf::DW_OP_bregx);
+ AP.OutStreamer.AddComment(Twine(Reg));
+ AP.EmitULEB128(Reg);
+ }
+ AP.EmitSLEB128(Offset);
+ if (Deref)
+ AP.EmitInt8(dwarf::DW_OP_deref);
+}
+
+/// Emit a dwarf register operation for describing
+/// - a small value occupying only part of a register or
+/// - a small register representing only part of a value.
+static void emitDwarfOpPiece(const AsmPrinter &AP,
+ unsigned Size, unsigned Offset) {
+ assert(Size > 0);
+ if (Offset > 0) {
+ AP.OutStreamer.AddComment("DW_OP_bit_piece");
+ AP.EmitInt8(dwarf::DW_OP_bit_piece);
+ AP.OutStreamer.AddComment(Twine(Size));
+ AP.EmitULEB128(Size);
+ AP.OutStreamer.AddComment(Twine(Offset));
+ AP.EmitULEB128(Offset);
+ } else {
+ AP.OutStreamer.AddComment("DW_OP_piece");
+ AP.EmitInt8(dwarf::DW_OP_piece);
+ unsigned ByteSize = Size / 8; // Assuming 8 bits per byte.
+ AP.OutStreamer.AddComment(Twine(ByteSize));
+ AP.EmitULEB128(ByteSize);
+ }
+}
+
+/// Some targets do not provide a DWARF register number for every
+/// register. This function attempts to emit a dwarf register by
+/// emitting a piece of a super-register or by piecing together
+/// multiple subregisters that alias the register.
+static void EmitDwarfRegOpPiece(const AsmPrinter &AP,
+ const MachineLocation &MLoc) {
+ assert(!MLoc.isIndirect());
+ const TargetRegisterInfo *TRI = AP.TM.getRegisterInfo();