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Revert r199628: "[AArch64 NEON] Fix a bug caused by undef lane when generating VEXT."
[oota-llvm.git]
/
lib
/
CodeGen
/
DFAPacketizer.cpp
diff --git
a/lib/CodeGen/DFAPacketizer.cpp
b/lib/CodeGen/DFAPacketizer.cpp
index 1a8bcf6a6e838f95a39f94bdbeb2ed74e22e3b1e..6619bcfd194f1780159e45728c76d58f7422686c 100644
(file)
--- a/
lib/CodeGen/DFAPacketizer.cpp
+++ b/
lib/CodeGen/DFAPacketizer.cpp
@@
-23,12
+23,12
@@
//
//===----------------------------------------------------------------------===//
//
//===----------------------------------------------------------------------===//
-#include "llvm/CodeGen/ScheduleDAGInstrs.h"
#include "llvm/CodeGen/DFAPacketizer.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrBundle.h"
#include "llvm/CodeGen/DFAPacketizer.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrBundle.h"
-#include "llvm/
Target/TargetInstrInfo
.h"
+#include "llvm/
CodeGen/ScheduleDAGInstrs
.h"
#include "llvm/MC/MCInstrItineraries.h"
#include "llvm/MC/MCInstrItineraries.h"
+#include "llvm/Target/TargetInstrInfo.h"
using namespace llvm;
DFAPacketizer::DFAPacketizer(const InstrItineraryData *I, const int (*SIT)[2],
using namespace llvm;
DFAPacketizer::DFAPacketizer(const InstrItineraryData *I, const int (*SIT)[2],
@@
-160,12
+160,11
@@
void VLIWPacketizerList::PacketizeMIs(MachineBasicBlock *MBB,
MachineBasicBlock::iterator EndItr) {
assert(VLIWScheduler && "VLIW Scheduler is not initialized!");
VLIWScheduler->startBlock(MBB);
MachineBasicBlock::iterator EndItr) {
assert(VLIWScheduler && "VLIW Scheduler is not initialized!");
VLIWScheduler->startBlock(MBB);
- VLIWScheduler->enterRegion(MBB, BeginItr, EndItr, MBB->size());
+ VLIWScheduler->enterRegion(MBB, BeginItr, EndItr,
+ std::distance(BeginItr, EndItr));
VLIWScheduler->schedule();
VLIWScheduler->schedule();
- VLIWScheduler->exitRegion();
// Generate MI -> SU map.
// Generate MI -> SU map.
- //std::map <MachineInstr*, SUnit*> MIToSUnit;
MIToSUnit.clear();
for (unsigned i = 0, e = VLIWScheduler->SUnits.size(); i != e; ++i) {
SUnit *SU = &VLIWScheduler->SUnits[i];
MIToSUnit.clear();
for (unsigned i = 0, e = VLIWScheduler->SUnits.size(); i != e; ++i) {
SUnit *SU = &VLIWScheduler->SUnits[i];
@@
-222,4
+221,6
@@
void VLIWPacketizerList::PacketizeMIs(MachineBasicBlock *MBB,
// End any packet left behind.
endPacket(MBB, EndItr);
// End any packet left behind.
endPacket(MBB, EndItr);
+ VLIWScheduler->exitRegion();
+ VLIWScheduler->finishBlock();
}
}