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Use a MemIntrinsicSDNode for ISD::PREFETCH, which touches
[oota-llvm.git]
/
lib
/
CodeGen
/
DeadMachineInstructionElim.cpp
diff --git
a/lib/CodeGen/DeadMachineInstructionElim.cpp
b/lib/CodeGen/DeadMachineInstructionElim.cpp
index a215a194e4058950c5b5680297d4ecf43c33d5f0..786de1b6a0bebe830a68670f802de900b5a86b29 100644
(file)
--- a/
lib/CodeGen/DeadMachineInstructionElim.cpp
+++ b/
lib/CodeGen/DeadMachineInstructionElim.cpp
@@
-36,7
+36,9
@@
namespace {
public:
static char ID; // Pass identification, replacement for typeid
public:
static char ID; // Pass identification, replacement for typeid
- DeadMachineInstructionElim() : MachineFunctionPass(&ID) {}
+ DeadMachineInstructionElim() : MachineFunctionPass(ID) {
+ initializeDeadMachineInstructionElimPass(*PassRegistry::getPassRegistry());
+ }
private:
bool isDead(const MachineInstr *MI) const;
private:
bool isDead(const MachineInstr *MI) const;
@@
-44,9
+46,8
@@
namespace {
}
char DeadMachineInstructionElim::ID = 0;
}
char DeadMachineInstructionElim::ID = 0;
-static RegisterPass<DeadMachineInstructionElim>
-Y("dead-mi-elimination",
- "Remove dead machine instructions");
+INITIALIZE_PASS(DeadMachineInstructionElim, "dead-mi-elimination",
+ "Remove dead machine instructions", false, false)
FunctionPass *llvm::createDeadMachineInstructionElimPass() {
return new DeadMachineInstructionElim();
FunctionPass *llvm::createDeadMachineInstructionElimPass() {
return new DeadMachineInstructionElim();
@@
-55,7
+56,7
@@
FunctionPass *llvm::createDeadMachineInstructionElimPass() {
bool DeadMachineInstructionElim::isDead(const MachineInstr *MI) const {
// Don't delete instructions with side effects.
bool SawStore = false;
bool DeadMachineInstructionElim::isDead(const MachineInstr *MI) const {
// Don't delete instructions with side effects.
bool SawStore = false;
- if (!MI->isSafeToMove(TII,
SawStore, 0
) && !MI->isPHI())
+ if (!MI->isSafeToMove(TII,
0, SawStore
) && !MI->isPHI())
return false;
// Examine each operand.
return false;
// Examine each operand.
@@
-81,9
+82,8
@@
bool DeadMachineInstructionElim::runOnMachineFunction(MachineFunction &MF) {
TRI = MF.getTarget().getRegisterInfo();
TII = MF.getTarget().getInstrInfo();
TRI = MF.getTarget().getRegisterInfo();
TII = MF.getTarget().getInstrInfo();
- // Compute a bitvector to represent all non-allocatable physregs.
- BitVector NonAllocatableRegs = TRI->getAllocatableSet(MF);
- NonAllocatableRegs.flip();
+ // Treat reserved registers as always live.
+ BitVector ReservedRegs = TRI->getReservedRegs(MF);
// Loop over all instructions in all blocks, from bottom to top, so that it's
// more likely that chains of dependent but ultimately dead instructions will
// Loop over all instructions in all blocks, from bottom to top, so that it's
// more likely that chains of dependent but ultimately dead instructions will
@@
-92,9
+92,8
@@
bool DeadMachineInstructionElim::runOnMachineFunction(MachineFunction &MF) {
I != E; ++I) {
MachineBasicBlock *MBB = &*I;
I != E; ++I) {
MachineBasicBlock *MBB = &*I;
- // Start out assuming that all non-allocatable registers are live
- // out of this block.
- LivePhysRegs = NonAllocatableRegs;
+ // Start out assuming that reserved registers are live out of this block.
+ LivePhysRegs = ReservedRegs;
// Also add any explicit live-out physregs for this block.
if (!MBB->empty() && MBB->back().getDesc().isReturn())
// Also add any explicit live-out physregs for this block.
if (!MBB->empty() && MBB->back().getDesc().isReturn())
@@
-105,6
+104,10
@@
bool DeadMachineInstructionElim::runOnMachineFunction(MachineFunction &MF) {
LivePhysRegs.set(Reg);
}
LivePhysRegs.set(Reg);
}
+ // FIXME: Add live-ins from sucessors to LivePhysRegs. Normally, physregs
+ // are not live across blocks, but some targets (x86) can have flags live
+ // out of a block.
+
// Now scan the instructions and delete dead ones, tracking physreg
// liveness as we go.
for (MachineBasicBlock::reverse_iterator MII = MBB->rbegin(),
// Now scan the instructions and delete dead ones, tracking physreg
// liveness as we go.
for (MachineBasicBlock::reverse_iterator MII = MBB->rbegin(),