-bool LiveVariables::runOnMachineFunction(MachineFunction &MF) {
- const TargetInstrInfo &TII = MF.getTarget().getInstrInfo();
- RegInfo = MF.getTarget().getRegisterInfo();
- assert(RegInfo && "Target doesn't have register information?");
-
- // First time though, initialize AllocatablePhysicalRegisters for the target
- if (AllocatablePhysicalRegisters.empty()) {
- // Make space, initializing to false...
- AllocatablePhysicalRegisters.resize(RegInfo->getNumRegs());
-
- // Loop over all of the register classes...
- for (MRegisterInfo::regclass_iterator RCI = RegInfo->regclass_begin(),
- E = RegInfo->regclass_end(); RCI != E; ++RCI)
- // Loop over all of the allocatable registers in the function...
- for (TargetRegisterClass::iterator I = (*RCI)->allocation_order_begin(MF),
- E = (*RCI)->allocation_order_end(MF); I != E; ++I)
- AllocatablePhysicalRegisters[*I] = true; // The reg is allocatable!
+void LiveVariables::HandlePhysRegDef(unsigned Reg, MachineInstr *MI) {
+ // What parts of the register are previously defined?
+ std::set<unsigned> Live;
+ if (PhysRegDef[Reg] || PhysRegUse[Reg]) {
+ Live.insert(Reg);
+ for (const unsigned *SS = TRI->getSubRegisters(Reg); *SS; ++SS)
+ Live.insert(*SS);
+ } else {
+ for (const unsigned *SubRegs = TRI->getSubRegisters(Reg);
+ unsigned SubReg = *SubRegs; ++SubRegs) {
+ // If a register isn't itself defined, but all parts that make up of it
+ // are defined, then consider it also defined.
+ // e.g.
+ // AL =
+ // AH =
+ // = AX
+ if (PhysRegDef[SubReg] || PhysRegUse[SubReg]) {
+ Live.insert(SubReg);
+ for (const unsigned *SS = TRI->getSubRegisters(SubReg); *SS; ++SS)
+ Live.insert(*SS);
+ }
+ }
+ }
+
+ // Start from the largest piece, find the last time any part of the register
+ // is referenced.
+ if (!HandlePhysRegKill(Reg)) {
+ // Only some of the sub-registers are used.
+ for (const unsigned *SubRegs = TRI->getSubRegisters(Reg);
+ unsigned SubReg = *SubRegs; ++SubRegs) {
+ if (!Live.count(SubReg))
+ // Skip if this sub-register isn't defined.
+ continue;
+ if (HandlePhysRegKill(SubReg)) {
+ Live.erase(SubReg);
+ for (const unsigned *SS = TRI->getSubRegisters(SubReg); *SS; ++SS)
+ Live.erase(*SS);
+ }
+ }
+ assert(Live.empty() && "Not all defined registers are killed / dead?");
+ }
+
+ if (MI) {
+ // Does this extend the live range of a super-register?
+ std::set<unsigned> Processed;
+ for (const unsigned *SuperRegs = TRI->getSuperRegisters(Reg);
+ unsigned SuperReg = *SuperRegs; ++SuperRegs) {
+ if (Processed.count(SuperReg))
+ continue;
+ MachineInstr *LastRef = PhysRegUse[SuperReg]
+ ? PhysRegUse[SuperReg] : PhysRegDef[SuperReg];
+ if (LastRef && LastRef != MI) {
+ // The larger register is previously defined. Now a smaller part is
+ // being re-defined. Treat it as read/mod/write if there are uses
+ // below.
+ // EAX =
+ // AX = EAX<imp-use,kill>, EAX<imp-def>
+ // ...
+ /// = EAX
+ if (hasRegisterUseBelow(SuperReg, MI, MI->getParent())) {
+ MI->addOperand(MachineOperand::CreateReg(SuperReg, false/*IsDef*/,
+ true/*IsImp*/,true/*IsKill*/));
+ MI->addOperand(MachineOperand::CreateReg(SuperReg, true/*IsDef*/,
+ true/*IsImp*/));
+ PhysRegDef[SuperReg] = MI;
+ PhysRegUse[SuperReg] = NULL;
+ Processed.insert(SuperReg);
+ for (const unsigned *SS = TRI->getSubRegisters(SuperReg); *SS; ++SS) {
+ PhysRegDef[*SS] = MI;
+ PhysRegUse[*SS] = NULL;
+ Processed.insert(*SS);
+ }
+ } else {
+ // Otherwise, the super register is killed.
+ if (HandlePhysRegKill(SuperReg)) {
+ PhysRegDef[SuperReg] = NULL;
+ PhysRegUse[SuperReg] = NULL;
+ for (const unsigned *SS = TRI->getSubRegisters(SuperReg); *SS; ++SS) {
+ PhysRegDef[*SS] = NULL;
+ PhysRegUse[*SS] = NULL;
+ Processed.insert(*SS);
+ }
+ }
+ }
+ }
+ }
+
+ // Remember this def.
+ PhysRegDef[Reg] = MI;
+ PhysRegUse[Reg] = NULL;
+ for (const unsigned *SubRegs = TRI->getSubRegisters(Reg);
+ unsigned SubReg = *SubRegs; ++SubRegs) {
+ PhysRegDef[SubReg] = MI;
+ PhysRegUse[SubReg] = NULL;
+ }