+bool LowerSubregsInstructionPass::LowerSubregToReg(MachineInstr *MI) {
+ MachineBasicBlock *MBB = MI->getParent();
+ assert((MI->getOperand(0).isReg() && MI->getOperand(0).isDef()) &&
+ MI->getOperand(1).isImm() &&
+ (MI->getOperand(2).isReg() && MI->getOperand(2).isUse()) &&
+ MI->getOperand(3).isImm() && "Invalid subreg_to_reg");
+
+ unsigned DstReg = MI->getOperand(0).getReg();
+ unsigned InsReg = MI->getOperand(2).getReg();
+ unsigned InsSIdx = MI->getOperand(2).getSubReg();
+ unsigned SubIdx = MI->getOperand(3).getImm();
+
+ assert(SubIdx != 0 && "Invalid index for insert_subreg");
+ unsigned DstSubReg = TRI->getSubReg(DstReg, SubIdx);
+
+ assert(TargetRegisterInfo::isPhysicalRegister(DstReg) &&
+ "Insert destination must be in a physical register");
+ assert(TargetRegisterInfo::isPhysicalRegister(InsReg) &&
+ "Inserted value must be in a physical register");
+
+ DEBUG(errs() << "subreg: CONVERTING: " << *MI);
+
+ if (DstSubReg == InsReg && InsSIdx == 0) {
+ // No need to insert an identify copy instruction.
+ // Watch out for case like this:
+ // %RAX<def> = ...
+ // %RAX<def> = SUBREG_TO_REG 0, %EAX:3<kill>, 3
+ // The first def is defining RAX, not EAX so the top bits were not
+ // zero extended.
+ DEBUG(errs() << "subreg: eliminated!");
+ } else {
+ // Insert sub-register copy
+ const TargetRegisterClass *TRC0= TRI->getPhysicalRegisterRegClass(DstSubReg);
+ const TargetRegisterClass *TRC1= TRI->getPhysicalRegisterRegClass(InsReg);
+ bool Emitted = TII->copyRegToReg(*MBB, MI, DstSubReg, InsReg, TRC0, TRC1);
+ (void)Emitted;
+ assert(Emitted && "Subreg and Dst must be of compatible register class");
+ // Transfer the kill/dead flags, if needed.
+ if (MI->getOperand(0).isDead())
+ TransferDeadFlag(MI, DstSubReg, TRI);
+ if (MI->getOperand(2).isKill())
+ TransferKillFlag(MI, InsReg, TRI);
+ DEBUG({
+ MachineBasicBlock::iterator dMI = MI;
+ errs() << "subreg: " << *(--dMI);
+ });
+ }
+
+ DEBUG(errs() << '\n');
+ MBB->erase(MI);
+ return true;
+}