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Fix the clang-cl self-host build by defining ~DwarfDebug out of line
[oota-llvm.git]
/
lib
/
CodeGen
/
MachineInstrBundle.cpp
diff --git
a/lib/CodeGen/MachineInstrBundle.cpp
b/lib/CodeGen/MachineInstrBundle.cpp
index 1f7fbfc719b07e60b71fe1d9c6bc66f0a5f8f49f..962169e1b15c59c2010af55ae1a793a8f2a48abc 100644
(file)
--- a/
lib/CodeGen/MachineInstrBundle.cpp
+++ b/
lib/CodeGen/MachineInstrBundle.cpp
@@
-8,14
+8,14
@@
//===----------------------------------------------------------------------===//
#include "llvm/CodeGen/MachineInstrBundle.h"
//===----------------------------------------------------------------------===//
#include "llvm/CodeGen/MachineInstrBundle.h"
+#include "llvm/ADT/SmallSet.h"
+#include "llvm/ADT/SmallVector.h"
+#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/Passes.h"
-#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetRegisterInfo.h"
-#include "llvm/ADT/SmallSet.h"
-#include "llvm/ADT/SmallVector.h"
using namespace llvm;
namespace {
using namespace llvm;
namespace {
@@
-26,7
+26,7
@@
namespace {
initializeUnpackMachineBundlesPass(*PassRegistry::getPassRegistry());
}
initializeUnpackMachineBundlesPass(*PassRegistry::getPassRegistry());
}
-
virtual bool runOnMachineFunction(MachineFunction &MF)
;
+
bool runOnMachineFunction(MachineFunction &MF) override
;
};
} // end anonymous namespace
};
} // end anonymous namespace
@@
-47,8
+47,8
@@
bool UnpackMachineBundles::runOnMachineFunction(MachineFunction &MF) {
// Remove BUNDLE instruction and the InsideBundle flags from bundled
// instructions.
if (MI->isBundle()) {
// Remove BUNDLE instruction and the InsideBundle flags from bundled
// instructions.
if (MI->isBundle()) {
- while (++MII != MIE && MII->is
InsideBundle
()) {
- MII->
setIsInsideBundle(false
);
+ while (++MII != MIE && MII->is
BundledWithPred
()) {
+ MII->
unbundleFromPred(
);
for (unsigned i = 0, e = MII->getNumOperands(); i != e; ++i) {
MachineOperand &MO = MII->getOperand(i);
if (MO.isReg() && MO.isInternalRead())
for (unsigned i = 0, e = MII->getNumOperands(); i != e; ++i) {
MachineOperand &MO = MII->getOperand(i);
if (MO.isReg() && MO.isInternalRead())
@@
-77,7
+77,7
@@
namespace {
initializeFinalizeMachineBundlesPass(*PassRegistry::getPassRegistry());
}
initializeFinalizeMachineBundlesPass(*PassRegistry::getPassRegistry());
}
-
virtual bool runOnMachineFunction(MachineFunction &MF)
;
+
bool runOnMachineFunction(MachineFunction &MF) override
;
};
} // end anonymous namespace
};
} // end anonymous namespace
@@
-101,13
+101,15
@@
void llvm::finalizeBundle(MachineBasicBlock &MBB,
MachineBasicBlock::instr_iterator FirstMI,
MachineBasicBlock::instr_iterator LastMI) {
assert(FirstMI != LastMI && "Empty bundle?");
MachineBasicBlock::instr_iterator FirstMI,
MachineBasicBlock::instr_iterator LastMI) {
assert(FirstMI != LastMI && "Empty bundle?");
+ MIBundleBuilder Bundle(MBB, FirstMI, LastMI);
const TargetMachine &TM = MBB.getParent()->getTarget();
const TargetInstrInfo *TII = TM.getInstrInfo();
const TargetRegisterInfo *TRI = TM.getRegisterInfo();
const TargetMachine &TM = MBB.getParent()->getTarget();
const TargetInstrInfo *TII = TM.getInstrInfo();
const TargetRegisterInfo *TRI = TM.getRegisterInfo();
- MachineInstrBuilder MIB = BuildMI(
MBB, FirstMI
, FirstMI->getDebugLoc(),
+ MachineInstrBuilder MIB = BuildMI(
*MBB.getParent()
, FirstMI->getDebugLoc(),
TII->get(TargetOpcode::BUNDLE));
TII->get(TargetOpcode::BUNDLE));
+ Bundle.prepend(MIB);
SmallVector<unsigned, 32> LocalDefs;
SmallSet<unsigned, 32> LocalDefSet;
SmallVector<unsigned, 32> LocalDefs;
SmallSet<unsigned, 32> LocalDefSet;
@@
-177,7
+179,6
@@
void llvm::finalizeBundle(MachineBasicBlock &MBB,
}
}
}
}
- FirstMI->setIsInsideBundle();
Defs.clear();
}
Defs.clear();
}
@@
-210,7
+211,7
@@
MachineBasicBlock::instr_iterator
llvm::finalizeBundle(MachineBasicBlock &MBB,
MachineBasicBlock::instr_iterator FirstMI) {
MachineBasicBlock::instr_iterator E = MBB.instr_end();
llvm::finalizeBundle(MachineBasicBlock &MBB,
MachineBasicBlock::instr_iterator FirstMI) {
MachineBasicBlock::instr_iterator E = MBB.instr_end();
- MachineBasicBlock::instr_iterator LastMI =
llvm
::next(FirstMI);
+ MachineBasicBlock::instr_iterator LastMI =
std
::next(FirstMI);
while (LastMI != E && LastMI->isInsideBundle())
++LastMI;
finalizeBundle(MBB, FirstMI, LastMI);
while (LastMI != E && LastMI->isInsideBundle())
++LastMI;
finalizeBundle(MBB, FirstMI, LastMI);
@@
-223,19
+224,18
@@
bool llvm::finalizeBundles(MachineFunction &MF) {
bool Changed = false;
for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) {
MachineBasicBlock &MBB = *I;
bool Changed = false;
for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) {
MachineBasicBlock &MBB = *I;
-
MachineBasicBlock::instr_iterator MII = MBB.instr_begin();
MachineBasicBlock::instr_iterator MII = MBB.instr_begin();
- assert(!MII->isInsideBundle() &&
- "First instr cannot be inside bundle before finalization!");
-
MachineBasicBlock::instr_iterator MIE = MBB.instr_end();
if (MII == MIE)
continue;
MachineBasicBlock::instr_iterator MIE = MBB.instr_end();
if (MII == MIE)
continue;
+ assert(!MII->isInsideBundle() &&
+ "First instr cannot be inside bundle before finalization!");
+
for (++MII; MII != MIE; ) {
if (!MII->isInsideBundle())
++MII;
else {
for (++MII; MII != MIE; ) {
if (!MII->isInsideBundle())
++MII;
else {
- MII = finalizeBundle(MBB,
llvm::prior
(MII));
+ MII = finalizeBundle(MBB,
std::prev
(MII));
Changed = true;
}
}
Changed = true;
}
}
@@
-281,7
+281,7
@@
MachineOperandIteratorBase::PhysRegInfo
MachineOperandIteratorBase::analyzePhysReg(unsigned Reg,
const TargetRegisterInfo *TRI) {
bool AllDefsDead = true;
MachineOperandIteratorBase::analyzePhysReg(unsigned Reg,
const TargetRegisterInfo *TRI) {
bool AllDefsDead = true;
- PhysRegInfo PRI = {false, false, false, false, false, false
, false
};
+ PhysRegInfo PRI = {false, false, false, false, false, false};
assert(TargetRegisterInfo::isPhysicalRegister(Reg) &&
"analyzePhysReg not given a physical register!");
assert(TargetRegisterInfo::isPhysicalRegister(Reg) &&
"analyzePhysReg not given a physical register!");
@@
-305,7
+305,9
@@
MachineOperandIteratorBase::analyzePhysReg(unsigned Reg,
// Reg or a super-reg is read, and perhaps killed also.
PRI.Reads = true;
PRI.Kills = MO.isKill();
// Reg or a super-reg is read, and perhaps killed also.
PRI.Reads = true;
PRI.Kills = MO.isKill();
- } if (IsRegOrOverlapping && MO.readsReg()) {
+ }
+
+ if (IsRegOrOverlapping && MO.readsReg()) {
PRI.ReadsOverlap = true;// Reg or an overlapping register is read.
}
PRI.ReadsOverlap = true;// Reg or an overlapping register is read.
}