-/// AddToLiveIns - Add register 'Reg' to the livein sets of BBs in the
-/// backedge path from MBB to LoopHeader.
-void MachineLICM::AddToLiveIns(unsigned Reg, MachineBasicBlock *MBB,
- MachineBasicBlock *LoopHeader) {
- SmallPtrSet<MachineBasicBlock*, 4> Visited;
- SmallVector<MachineBasicBlock*, 4> WorkList;
- WorkList.push_back(MBB);
- do {
- MBB = WorkList.pop_back_val();
- if (!Visited.insert(MBB))
- continue;
- MBB->addLiveIn(Reg);
- if (MBB == LoopHeader)
- continue;
- for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
- E = MBB->pred_end(); PI != E; ++PI)
- WorkList.push_back(*PI);
- } while (!WorkList.empty());
+/// AddToLiveIns - Add register 'Reg' to the livein sets of BBs in the current
+/// loop, and make sure it is not killed by any instructions in the loop.
+void MachineLICM::AddToLiveIns(unsigned Reg) {
+ const std::vector<MachineBasicBlock*> Blocks = CurLoop->getBlocks();
+ for (unsigned i = 0, e = Blocks.size(); i != e; ++i) {
+ MachineBasicBlock *BB = Blocks[i];
+ if (!BB->isLiveIn(Reg))
+ BB->addLiveIn(Reg);
+ for (MachineBasicBlock::iterator
+ MII = BB->begin(), E = BB->end(); MII != E; ++MII) {
+ MachineInstr *MI = &*MII;
+ for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
+ MachineOperand &MO = MI->getOperand(i);
+ if (!MO.isReg() || !MO.getReg() || MO.isDef()) continue;
+ if (MO.getReg() == Reg || TRI->isSuperRegister(Reg, MO.getReg()))
+ MO.setIsKill(false);
+ }
+ }
+ }