-}
-
-void RA::addSpillCode(IntervalPtrs::value_type li, int slot)
-{
- // We scan the instructions corresponding to each range. We load
- // when we have a use and spill at end of basic blocks or end of
- // ranges only if the register was modified.
- const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(li->reg);
-
- for (LiveIntervals::Interval::Ranges::iterator i = li->ranges.begin(),
- e = li->ranges.end(); i != e; ++i) {
- unsigned index = i->first & ~1;
- unsigned end = i->second;
-
- entry:
- bool dirty = false, loaded = false;
-
- // skip deleted instructions. getInstructionFromIndex returns
- // null if the instruction was deleted (because of coalescing
- // for example)
- while (!li_->getInstructionFromIndex(index)) index += 2;
- MachineBasicBlock::iterator mi = li_->getInstructionFromIndex(index);
- MachineBasicBlock* mbb = mi->getParent();
-
- for (; index < end; index += 2) {
- // ignore deleted instructions
- while (!li_->getInstructionFromIndex(index)) index += 2;
-
- // if we changed basic block we need to start over
- mi = li_->getInstructionFromIndex(index);
- if (mbb != mi->getParent()) {
- if (dirty) {
- mi = li_->getInstructionFromIndex(index-2);
- assert(mbb == mi->getParent() &&
- "rewound to wrong instruction?");
- DEBUG(std::cerr << "add store for reg" << li->reg << " to "
- "stack slot " << slot << " after: ";
- mi->print(std::cerr, *tm_));
- ++numStores;
- mri_->storeRegToStackSlot(*mi->getParent(),
- next(mi), li->reg, slot, rc);
- }
- goto entry;
- }