-void RA::addSpillCode(IntervalPtrs::value_type li, int slot)
-{
- // We scan the instructions corresponding to each range. We load
- // when we have a use and spill at end of basic blocks or end of
- // ranges only if the register was modified.
- const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(li->reg);
-
- for (LiveIntervals::Interval::Ranges::iterator i = li->ranges.begin(),
- e = li->ranges.end(); i != e; ++i) {
- unsigned index = i->first;
- unsigned end = i->second;
-
- bool loaded = false;
-
- // skip deleted instructions. getInstructionFromIndex returns
- // null if the instruction was deleted (because of coalescing
- // for example)
- while (!li_->getInstructionFromIndex(index))
- index += LiveIntervals::InstrSlots::NUM;
- MachineBasicBlock::iterator mi = li_->getInstructionFromIndex(index);
- MachineBasicBlock* mbb = mi->getParent();
- assert(mbb && "machine instruction not bound to basic block");
-
- for (; index < end; index += LiveIntervals::InstrSlots::NUM) {
- // ignore deleted instructions
- while (!li_->getInstructionFromIndex(index)) index += 2;
- mi = li_->getInstructionFromIndex(index);
- DEBUG(std::cerr << "\t\t\t\texamining: \t\t\t\t\t"
- << LiveIntervals::getBaseIndex(index) << '\t';
- mi->print(std::cerr, *tm_));
-
- // if it is used in this instruction load it
- for (unsigned i = 0; i < mi->getNumOperands(); ++i) {
- MachineOperand& mop = mi->getOperand(i);
- if (mop.isRegister() && mop.getReg() == li->reg &&
- mop.isUse() && !loaded) {
- loaded = true;
- mri_->loadRegFromStackSlot(*mbb, mi, li->reg, slot, rc);
- ++numLoads;
- DEBUG(std::cerr << "\t\t\t\tadded load for reg" << li->reg
- << " from ss#" << slot << " before: \t"
- << LiveIntervals::getBaseIndex(index) << '\t';
- mi->print(std::cerr, *tm_));
- }
- }
-
- // if it is defined in this instruction mark as dirty
- for (unsigned i = 0; i < mi->getNumOperands(); ++i) {
- MachineOperand& mop = mi->getOperand(i);
- if (mop.isRegister() && mop.getReg() == li->reg &&
- mop.isDef()) {
- loaded = true;
-
- mri_->storeRegToStackSlot(*mbb, next(mi), li->reg, slot,rc);
- ++numStores;
- DEBUG(std::cerr << "\t\t\t\tadded store for reg" << li->reg
- << " to ss#" << slot << " after: \t\t"
- << LiveIntervals::getBaseIndex(index) << " \t";
- prior(mi,2)->print(std::cerr, *tm_));
- }
- }
- }
- }