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Remove unused BitVectors from getAllocatableSet().
[oota-llvm.git]
/
lib
/
CodeGen
/
RegisterScavenging.cpp
diff --git
a/lib/CodeGen/RegisterScavenging.cpp
b/lib/CodeGen/RegisterScavenging.cpp
index ae7c8fc7e8359faaa4fb5532654a925c32c8b159..5ec6564ce398c81862a8392ab62464c3bd9ee89d 100644
(file)
--- a/
lib/CodeGen/RegisterScavenging.cpp
+++ b/
lib/CodeGen/RegisterScavenging.cpp
@@
-37,16
+37,13
@@
using namespace llvm;
void RegScavenger::setUsed(unsigned Reg) {
RegsAvailable.reset(Reg);
void RegScavenger::setUsed(unsigned Reg) {
RegsAvailable.reset(Reg);
- for (const unsigned *SubRegs = TRI->getSubRegisters(Reg);
- unsigned SubReg = *SubRegs; ++SubRegs)
- RegsAvailable.reset(SubReg);
+ for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs)
+ RegsAvailable.reset(*SubRegs);
}
bool RegScavenger::isAliasUsed(unsigned Reg) const {
}
bool RegScavenger::isAliasUsed(unsigned Reg) const {
- if (isUsed(Reg))
- return true;
- for (const uint16_t *R = TRI->getAliasSet(Reg); *R; ++R)
- if (isUsed(*R))
+ for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
+ if (isUsed(*AI))
return true;
return false;
}
return true;
return false;
}
@@
-83,6
+80,11
@@
void RegScavenger::enterBasicBlock(MachineBasicBlock *mbb) {
assert((NumPhysRegs == 0 || NumPhysRegs == TRI->getNumRegs()) &&
"Target changed?");
assert((NumPhysRegs == 0 || NumPhysRegs == TRI->getNumRegs()) &&
"Target changed?");
+ // It is not possible to use the register scavenger after late optimization
+ // passes that don't preserve accurate liveness information.
+ assert(MRI->tracksLiveness() &&
+ "Cannot use register scavenger with inaccurate liveness");
+
// Self-initialize.
if (!MBB) {
NumPhysRegs = TRI->getNumRegs();
// Self-initialize.
if (!MBB) {
NumPhysRegs = TRI->getNumRegs();
@@
-90,9
+92,6
@@
void RegScavenger::enterBasicBlock(MachineBasicBlock *mbb) {
KillRegs.resize(NumPhysRegs);
DefRegs.resize(NumPhysRegs);
KillRegs.resize(NumPhysRegs);
DefRegs.resize(NumPhysRegs);
- // Create reserved registers bitvector.
- ReservedRegs = TRI->getReservedRegs(MF);
-
// Create callee-saved registers bitvector.
CalleeSavedRegs.resize(NumPhysRegs);
const uint16_t *CSRegs = TRI->getCalleeSavedRegs(&MF);
// Create callee-saved registers bitvector.
CalleeSavedRegs.resize(NumPhysRegs);
const uint16_t *CSRegs = TRI->getCalleeSavedRegs(&MF);
@@
-109,8
+108,8
@@
void RegScavenger::enterBasicBlock(MachineBasicBlock *mbb) {
void RegScavenger::addRegWithSubRegs(BitVector &BV, unsigned Reg) {
BV.set(Reg);
void RegScavenger::addRegWithSubRegs(BitVector &BV, unsigned Reg) {
BV.set(Reg);
- for (
const unsigned *R = TRI->getSubRegisters(Reg); *R; R++
)
- BV.set(*
R
);
+ for (
MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs
)
+ BV.set(*
SubRegs
);
}
void RegScavenger::forward() {
}
void RegScavenger::forward() {
@@
-190,9
+189,8
@@
void RegScavenger::forward() {
// Ideally we would like a way to model this, but leaving the
// insert_subreg around causes both correctness and performance issues.
bool SubUsed = false;
// Ideally we would like a way to model this, but leaving the
// insert_subreg around causes both correctness and performance issues.
bool SubUsed = false;
- for (const unsigned *SubRegs = TRI->getSubRegisters(Reg);
- unsigned SubReg = *SubRegs; ++SubRegs)
- if (isUsed(SubReg)) {
+ for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs)
+ if (isUsed(*SubRegs)) {
SubUsed = true;
break;
}
SubUsed = true;
break;
}
@@
-224,9
+222,9
@@
void RegScavenger::getRegsUsed(BitVector &used, bool includeReserved) {
used = RegsAvailable;
used.flip();
if (includeReserved)
used = RegsAvailable;
used.flip();
if (includeReserved)
- used |=
ReservedRegs
;
+ used |=
MRI->getReservedRegs()
;
else
else
- used.reset(
ReservedRegs
);
+ used.reset(
MRI->getReservedRegs()
);
}
unsigned RegScavenger::FindUnusedReg(const TargetRegisterClass *RC) const {
}
unsigned RegScavenger::FindUnusedReg(const TargetRegisterClass *RC) const {
@@
-291,9
+289,8
@@
unsigned RegScavenger::findSurvivorReg(MachineBasicBlock::iterator StartMI,
isVirtKillInsn = true;
continue;
}
isVirtKillInsn = true;
continue;
}
- Candidates.reset(MO.getReg());
- for (const uint16_t *R = TRI->getAliasSet(MO.getReg()); *R; R++)
- Candidates.reset(*R);
+ for (MCRegAliasIterator AI(MO.getReg(), TRI, true); AI.isValid(); ++AI)
+ Candidates.reset(*AI);
}
// If we're not in a virtual reg's live range, this is a valid
// restore point.
}
// If we're not in a virtual reg's live range, this is a valid
// restore point.