+/// RedefinesSuperRegPart - Return true if the specified register is redefining
+/// part of a super-register.
+static bool RedefinesSuperRegPart(const MachineInstr *MI, unsigned SubReg,
+ const TargetRegisterInfo *TRI) {
+ bool SeenSuperUse = false;
+ bool SeenSuperDef = false;
+ for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
+ const MachineOperand &MO = MI->getOperand(i);
+ if (!MO.isRegister())
+ continue;
+ if (TRI->isSuperRegister(SubReg, MO.getReg())) {
+ if (MO.isUse())
+ SeenSuperUse = true;
+ else if (MO.isImplicit())
+ SeenSuperDef = true;
+ }
+ }
+
+ return SeenSuperDef && SeenSuperUse;
+}
+
+static bool RedefinesSuperRegPart(const MachineInstr *MI,
+ const MachineOperand &MO,
+ const TargetRegisterInfo *TRI) {
+ assert(MO.isRegister() && MO.isDef() && "Not a register def!");
+ return RedefinesSuperRegPart(MI, MO.getReg(), TRI);
+}
+
+/// setUsed - Set the register and its sub-registers as being used.
+void RegScavenger::setUsed(unsigned Reg, bool ImpDef) {
+ RegsAvailable.reset(Reg);
+ ImplicitDefed[Reg] = ImpDef;
+
+ for (const unsigned *SubRegs = TRI->getSubRegisters(Reg);
+ unsigned SubReg = *SubRegs; ++SubRegs) {
+ RegsAvailable.reset(SubReg);
+ ImplicitDefed[SubReg] = ImpDef;
+ }
+}
+
+/// setUnused - Set the register and its sub-registers as being unused.
+void RegScavenger::setUnused(unsigned Reg, const MachineInstr *MI) {
+ RegsAvailable.set(Reg);
+ ImplicitDefed.reset(Reg);
+
+ for (const unsigned *SubRegs = TRI->getSubRegisters(Reg);
+ unsigned SubReg = *SubRegs; ++SubRegs)
+ if (!RedefinesSuperRegPart(MI, Reg, TRI)) {
+ RegsAvailable.set(SubReg);
+ ImplicitDefed.reset(SubReg);
+ }
+}
+
+void RegScavenger::enterBasicBlock(MachineBasicBlock *mbb) {
+ MachineFunction &MF = *mbb->getParent();