- switch (Flags & 7) {
- default: assert(0 && "Bad flags!");
- case 1: // Use of register.
- for (; NumVals; --NumVals, ++i) {
- unsigned Reg = cast<RegisterSDNode>(Node->getOperand(i))->getReg();
- MI->addOperand(MachineOperand::CreateReg(Reg, false));
- }
- break;
- case 2: // Def of register.
- for (; NumVals; --NumVals, ++i) {
- unsigned Reg = cast<RegisterSDNode>(Node->getOperand(i))->getReg();
- MI->addOperand(MachineOperand::CreateReg(Reg, true));
- }
- break;
- case 3: { // Immediate.
- for (; NumVals; --NumVals, ++i) {
- if (ConstantSDNode *CS =
- dyn_cast<ConstantSDNode>(Node->getOperand(i))) {
- MI->addOperand(MachineOperand::CreateImm(CS->getValue()));
- } else if (GlobalAddressSDNode *GA =
- dyn_cast<GlobalAddressSDNode>(Node->getOperand(i))) {
- MI->addOperand(MachineOperand::CreateGA(GA->getGlobal(),
- GA->getOffset()));
- } else {
- BasicBlockSDNode *BB =cast<BasicBlockSDNode>(Node->getOperand(i));
- MI->addOperand(MachineOperand::CreateMBB(BB->getBasicBlock()));
- }
- }
- break;
- }
- case 4: // Addressing mode.
- // The addressing mode has been selected, just add all of the
- // operands to the machine instruction.
- for (; NumVals; --NumVals, ++i)
- AddOperand(MI, Node->getOperand(i), 0, 0, VRBaseMap);
- break;
+ switch (Flags & 7) {
+ default: assert(0 && "Bad flags!");
+ case 2: // Def of register.
+ for (; NumVals; --NumVals, ++i) {
+ unsigned Reg = cast<RegisterSDNode>(Node->getOperand(i))->getReg();
+ MI->addOperand(MachineOperand::CreateReg(Reg, true));