- MachineBasicBlock& MBB,
- DenseMap<unsigned, unsigned>& CurrentDominatingParent,
- DenseMap<unsigned, unsigned>& ImmediateDominatingParent) {
- for (MachineBasicBlock::iterator BBI = MBB.begin(), BBE = MBB.end();
- BBI != BBE; ++BBI) {
- for (unsigned i = 0, e = BBI->getNumOperands(); i != e; ++i) {
- MachineOperand& MO = BBI->getOperand(i);
+ MachineBasicBlock &MBB,
+ DenseMap<unsigned, unsigned> &CurrentDominatingParent,
+ DenseMap<unsigned, unsigned> &ImmediateDominatingParent) {
+ // Sort defs by their order in the original basic block, as the code below
+ // assumes that it is processing definitions in dominance order.
+ std::vector<MachineInstr*> &DefInstrs = PHISrcDefs[&MBB];
+ std::sort(DefInstrs.begin(), DefInstrs.end(), MIIndexCompare(LI));
+
+ for (std::vector<MachineInstr*>::const_iterator BBI = DefInstrs.begin(),
+ BBE = DefInstrs.end(); BBI != BBE; ++BBI) {
+ for (MachineInstr::const_mop_iterator I = (*BBI)->operands_begin(),
+ E = (*BBI)->operands_end(); I != E; ++I) {
+ const MachineOperand &MO = *I;
+
+ // FIXME: This would be faster if it were possible to bail out of checking
+ // an instruction's operands after the explicit defs, but this is incorrect
+ // for variadic instructions, which may appear before register allocation
+ // in the future.