-
- // If it's a split live interval, insert a reload for the first use
- // unless it's previously defined in the MBB.
- unsigned SplitReg = VRM.getPreSplitReg(VirtReg);
- if (SplitReg) {
- if (ReloadedSplits.insert(VirtReg)) {
- bool HasUse = MO.isUse();
- // If it's a def, we don't need to reload the value unless it's
- // a two-address code.
- if (!HasUse) {
- for (unsigned j = i+1; j != e; ++j) {
- MachineOperand &MOJ = MI.getOperand(j);
- if (MOJ.isRegister() && MOJ.getReg() == VirtReg) {
- HasUse = true;
- break;
- }
- }
- }
-
- if (HasUse) {
- if (VRM.isReMaterialized(VirtReg)) {
- MRI->reMaterialize(MBB, &MI, Phys,
- VRM.getReMaterializedMI(VirtReg));
- ++NumReMats;
- } else {
- const TargetRegisterClass* RC = RegMap->getRegClass(VirtReg);
- MRI->loadRegFromStackSlot(MBB, &MI, Phys, VRM.getStackSlot(VirtReg), RC);
- ++NumLoads;
- }
- // This invalidates Phys.
- Spills.ClobberPhysReg(Phys);
- UpdateKills(*prior(MII), RegKills, KillOps);
- DOUT << '\t' << *prior(MII);
- }
- }
- }
-
- unsigned RReg = SubIdx ? MRI->getSubReg(Phys, SubIdx) : Phys;