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[X86][Haswell][SchedModel] Add architecture specific scheduling models.
[oota-llvm.git]
/
lib
/
ExecutionEngine
/
TargetSelect.cpp
diff --git
a/lib/ExecutionEngine/TargetSelect.cpp
b/lib/ExecutionEngine/TargetSelect.cpp
index 4e52a98c332bf9a254eaa5b20db534c48acf4937..b10d51f648628866bd917c8f658828ba008ad1cc 100644
(file)
--- a/
lib/ExecutionEngine/TargetSelect.cpp
+++ b/
lib/ExecutionEngine/TargetSelect.cpp
@@
-16,8
+16,8
@@
#include "llvm/ExecutionEngine/ExecutionEngine.h"
#include "llvm/ADT/Triple.h"
#include "llvm/ExecutionEngine/ExecutionEngine.h"
#include "llvm/ADT/Triple.h"
+#include "llvm/IR/Module.h"
#include "llvm/MC/SubtargetFeature.h"
#include "llvm/MC/SubtargetFeature.h"
-#include "llvm/Module.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Host.h"
#include "llvm/Support/TargetRegistry.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Host.h"
#include "llvm/Support/TargetRegistry.h"
@@
-32,18
+32,7
@@
TargetMachine *EngineBuilder::selectTarget() {
// must use the host architecture.
if (UseMCJIT && WhichEngine != EngineKind::Interpreter && M)
TT.setTriple(M->getTargetTriple());
// must use the host architecture.
if (UseMCJIT && WhichEngine != EngineKind::Interpreter && M)
TT.setTriple(M->getTargetTriple());
- else {
- TT.setTriple(LLVM_HOSTTRIPLE);
-#if defined(__APPLE__)
-#if defined(__LP64__)
- if (TT.isArch32Bit())
- TT = TT.get64BitArchVariant();
-#else
- if (TT.isArch64Bit())
- TT = TT.get32BitArchVariant();
-#endif
-#endif // APPLE
- }
+
return selectTarget(TT, MArch, MCPU, MAttrs);
}
return selectTarget(TT, MArch, MCPU, MAttrs);
}
@@
-55,10
+44,10
@@
TargetMachine *EngineBuilder::selectTarget(const Triple &TargetTriple,
const SmallVectorImpl<std::string>& MAttrs) {
Triple TheTriple(TargetTriple);
if (TheTriple.getTriple().empty())
const SmallVectorImpl<std::string>& MAttrs) {
Triple TheTriple(TargetTriple);
if (TheTriple.getTriple().empty())
- TheTriple.setTriple(sys::get
DefaultTarget
Triple());
+ TheTriple.setTriple(sys::get
Process
Triple());
// Adjust the triple to match what the user requested.
// Adjust the triple to match what the user requested.
- const Target *TheTarget =
0
;
+ const Target *TheTarget =
nullptr
;
if (!MArch.empty()) {
for (TargetRegistry::iterator it = TargetRegistry::begin(),
ie = TargetRegistry::end(); it != ie; ++it) {
if (!MArch.empty()) {
for (TargetRegistry::iterator it = TargetRegistry::begin(),
ie = TargetRegistry::end(); it != ie; ++it) {
@@
-72,7
+61,7
@@
TargetMachine *EngineBuilder::selectTarget(const Triple &TargetTriple,
if (ErrorStr)
*ErrorStr = "No available targets are compatible with this -march, "
"see -version for the available targets.\n";
if (ErrorStr)
*ErrorStr = "No available targets are compatible with this -march, "
"see -version for the available targets.\n";
- return
0
;
+ return
nullptr
;
}
// Adjust the triple to match (if known), otherwise stick with the
}
// Adjust the triple to match (if known), otherwise stick with the
@@
-83,10
+72,10
@@
TargetMachine *EngineBuilder::selectTarget(const Triple &TargetTriple,
} else {
std::string Error;
TheTarget = TargetRegistry::lookupTarget(TheTriple.getTriple(), Error);
} else {
std::string Error;
TheTarget = TargetRegistry::lookupTarget(TheTriple.getTriple(), Error);
- if (
TheTarget == 0
) {
+ if (
!TheTarget
) {
if (ErrorStr)
*ErrorStr = Error;
if (ErrorStr)
*ErrorStr = Error;
- return
0
;
+ return
nullptr
;
}
}
}
}
@@
-99,6
+88,14
@@
TargetMachine *EngineBuilder::selectTarget(const Triple &TargetTriple,
FeaturesStr = Features.getString();
}
FeaturesStr = Features.getString();
}
+ // FIXME: non-iOS ARM FastISel is broken with MCJIT.
+ if (UseMCJIT &&
+ TheTriple.getArch() == Triple::arm &&
+ !TheTriple.isiOS() &&
+ OptLevel == CodeGenOpt::None) {
+ OptLevel = CodeGenOpt::Less;
+ }
+
// Allocate a target...
TargetMachine *Target = TheTarget->createTargetMachine(TheTriple.getTriple(),
MCPU, FeaturesStr,
// Allocate a target...
TargetMachine *Target = TheTarget->createTargetMachine(TheTriple.getTriple(),
MCPU, FeaturesStr,