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Remove MCELFSymbolFlags.h. It is now internal to MCSymbolELF.
[oota-llvm.git]
/
lib
/
Target
/
ARM
/
ARMBaseRegisterInfo.cpp
diff --git
a/lib/Target/ARM/ARMBaseRegisterInfo.cpp
b/lib/Target/ARM/ARMBaseRegisterInfo.cpp
index 49efdc31d7897ef27f731a805f0a6eb67e76790a..3f79a9b53d704beff2874b6655f7039ee653aeec 100644
(file)
--- a/
lib/Target/ARM/ARMBaseRegisterInfo.cpp
+++ b/
lib/Target/ARM/ARMBaseRegisterInfo.cpp
@@
-245,11
+245,15
@@
ARMBaseRegisterInfo::getRegAllocationHints(unsigned VirtReg,
// This register should preferably be even (Odd == 0) or odd (Odd == 1).
// Check if the other part of the pair has already been assigned, and provide
// the paired register as the first hint.
// This register should preferably be even (Odd == 0) or odd (Odd == 1).
// Check if the other part of the pair has already been assigned, and provide
// the paired register as the first hint.
+ unsigned Paired = Hint.second;
+ if (Paired == 0)
+ return;
+
unsigned PairedPhys = 0;
unsigned PairedPhys = 0;
- if (
VRM && VRM->hasPhys(Hint.secon
d)) {
- PairedPhys =
getPairedGPR(VRM->getPhys(Hint.second), Odd, this)
;
- if (PairedPhys && MRI.isReserved(PairedPhys))
-
PairedPhys = 0
;
+ if (
TargetRegisterInfo::isPhysicalRegister(Paire
d)) {
+ PairedPhys =
Paired
;
+ } else if (VRM && VRM->hasPhys(Paired)) {
+
PairedPhys = getPairedGPR(VRM->getPhys(Paired), Odd, this)
;
}
// First prefer the paired physreg.
}
// First prefer the paired physreg.
@@
-284,9
+288,14
@@
ARMBaseRegisterInfo::updateRegAllocHint(unsigned Reg, unsigned NewReg,
// change.
unsigned OtherReg = Hint.second;
Hint = MRI->getRegAllocationHint(OtherReg);
// change.
unsigned OtherReg = Hint.second;
Hint = MRI->getRegAllocationHint(OtherReg);
- if (Hint.second == Reg)
- // Make sure the pair has not already divorced.
+ // Make sure the pair has not already divorced.
+ if (Hint.second == Reg) {
MRI->setRegAllocationHint(OtherReg, Hint.first, NewReg);
MRI->setRegAllocationHint(OtherReg, Hint.first, NewReg);
+ if (TargetRegisterInfo::isVirtualRegister(NewReg))
+ MRI->setRegAllocationHint(NewReg,
+ Hint.first == (unsigned)ARMRI::RegPairOdd ? ARMRI::RegPairEven
+ : ARMRI::RegPairOdd, OtherReg);
+ }
}
}
}
}
@@
-536,9
+545,8
@@
needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const {
// on whether there are any local variables that would trigger it.
unsigned StackAlign = TFI->getStackAlignment();
if (TFI->hasFP(MF) &&
// on whether there are any local variables that would trigger it.
unsigned StackAlign = TFI->getStackAlignment();
if (TFI->hasFP(MF) &&
- (MI->getDesc().TSFlags & ARMII::AddrModeMask) != ARMII::AddrModeT1_s &&
!((MFI->getLocalFrameMaxAlign() > StackAlign) && canRealignStack(MF))) {
!((MFI->getLocalFrameMaxAlign() > StackAlign) && canRealignStack(MF))) {
- if (isFrameOffsetLegal(MI, FPOffset))
+ if (isFrameOffsetLegal(MI,
getFrameRegister(MF),
FPOffset))
return false;
}
// If we can reference via the stack pointer, try that.
return false;
}
// If we can reference via the stack pointer, try that.
@@
-546,7
+554,7
@@
needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const {
// to only disallow SP relative references in the live range of
// the VLA(s). In practice, it's unclear how much difference that
// would make, but it may be worth doing.
// to only disallow SP relative references in the live range of
// the VLA(s). In practice, it's unclear how much difference that
// would make, but it may be worth doing.
- if (!MFI->hasVarSizedObjects() && isFrameOffsetLegal(MI, Offset))
+ if (!MFI->hasVarSizedObjects() && isFrameOffsetLegal(MI,
ARM::SP,
Offset))
return false;
// The offset likely isn't legal, we want to allocate a virtual base register.
return false;
// The offset likely isn't legal, we want to allocate a virtual base register.
@@
-609,7
+617,7
@@
void ARMBaseRegisterInfo::resolveFrameIndex(MachineInstr &MI, unsigned BaseReg,
(void)Done;
}
(void)Done;
}
-bool ARMBaseRegisterInfo::isFrameOffsetLegal(const MachineInstr *MI,
+bool ARMBaseRegisterInfo::isFrameOffsetLegal(const MachineInstr *MI,
unsigned BaseReg,
int64_t Offset) const {
const MCInstrDesc &Desc = MI->getDesc();
unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask);
int64_t Offset) const {
const MCInstrDesc &Desc = MI->getDesc();
unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask);
@@
-653,7
+661,7
@@
bool ARMBaseRegisterInfo::isFrameOffsetLegal(const MachineInstr *MI,
NumBits = 8;
break;
case ARMII::AddrModeT1_s:
NumBits = 8;
break;
case ARMII::AddrModeT1_s:
- NumBits =
8
;
+ NumBits =
(BaseReg == ARM::SP ? 8 : 5)
;
Scale = 4;
isSigned = false;
break;
Scale = 4;
isSigned = false;
break;