-/// T2I_bin_cpsr_irs - Defines a set of (op reg, {so_imm|r|so_reg}) patterns for
-/// a binary operation that produces a value. These are predicable and modify
-/// CPSR.
-multiclass T2I_bin_cpsr_irs<bits<4> opcod, string opc, PatFrag opnode,
- bit Commutable = 0, string wide = ""> {
- // shifted imm
- def ri : T2sI_cpsr<(outs rGPR:$dst), (ins rGPR:$lhs, t2_so_imm:$rhs),
- IIC_iALUi, opc, "\t$dst, $lhs, $rhs",
- [(set rGPR:$dst, (opnode rGPR:$lhs, t2_so_imm:$rhs))]> {
- let Inst{31-27} = 0b11110;
- let Inst{25} = 0;
- let Inst{24-21} = opcod;
- let Inst{20} = 1; // The S bit.
- let Inst{15} = 0;
- }
- // register
- def rr : T2sI_cpsr<(outs rGPR:$dst), (ins rGPR:$lhs, rGPR:$rhs),
- IIC_iALUr, opc, !strconcat(wide, "\t$dst, $lhs, $rhs"),
- [(set rGPR:$dst, (opnode rGPR:$lhs, rGPR:$rhs))]> {
- let isCommutable = Commutable;
- let Inst{31-27} = 0b11101;
- let Inst{26-25} = 0b01;
- let Inst{24-21} = opcod;
- let Inst{20} = 1; // The S bit.
- let Inst{14-12} = 0b000; // imm3
- let Inst{7-6} = 0b00; // imm2
- let Inst{5-4} = 0b00; // type
- }
- // shifted register
- def rs : T2sI_cpsr<(outs rGPR:$dst), (ins rGPR:$lhs, t2_so_reg:$rhs),
- IIC_iALUsi, opc, !strconcat(wide, "\t$dst, $lhs, $rhs"),
- [(set rGPR:$dst, (opnode rGPR:$lhs, t2_so_reg:$rhs))]> {
- let Inst{31-27} = 0b11101;
- let Inst{26-25} = 0b01;
- let Inst{24-21} = opcod;
- let Inst{20} = 1; // The S bit.
- }
-}
-