+/// foldMemoryOperand - PowerPC (like most RISC's) can only fold spills into
+/// copy instructions, turning them into load/store instructions.
+MachineInstr *PPCRegisterInfo::foldMemoryOperand(MachineInstr *MI,
+ unsigned OpNum,
+ int FrameIndex) const {
+ // Make sure this is a reg-reg copy. Note that we can't handle MCRF, because
+ // it takes more than one instruction to store it.
+ unsigned Opc = MI->getOpcode();
+
+ if ((Opc == PPC::OR4 &&
+ MI->getOperand(1).getReg() == MI->getOperand(2).getReg())) {
+ if (OpNum == 0) { // move -> store
+ unsigned InReg = MI->getOperand(1).getReg();
+ return addFrameReference(BuildMI(PPC::STW,
+ 3).addReg(InReg), FrameIndex);
+ } else { // move -> load
+ unsigned OutReg = MI->getOperand(0).getReg();
+ return addFrameReference(BuildMI(PPC::LWZ, 2, OutReg), FrameIndex);
+ }
+ } else if ((Opc == PPC::OR8 &&
+ MI->getOperand(1).getReg() == MI->getOperand(2).getReg())) {
+ if (OpNum == 0) { // move -> store
+ unsigned InReg = MI->getOperand(1).getReg();
+ return addFrameReference(BuildMI(PPC::STD,
+ 3).addReg(InReg), FrameIndex);
+ } else { // move -> load
+ unsigned OutReg = MI->getOperand(0).getReg();
+ return addFrameReference(BuildMI(PPC::LD, 2, OutReg), FrameIndex);
+ }
+ } else if (Opc == PPC::FMRD) {
+ if (OpNum == 0) { // move -> store
+ unsigned InReg = MI->getOperand(1).getReg();
+ return addFrameReference(BuildMI(PPC::STFD,
+ 3).addReg(InReg), FrameIndex);
+ } else { // move -> load
+ unsigned OutReg = MI->getOperand(0).getReg();
+ return addFrameReference(BuildMI(PPC::LFD, 2, OutReg), FrameIndex);
+ }
+ } else if (Opc == PPC::FMRS) {
+ if (OpNum == 0) { // move -> store
+ unsigned InReg = MI->getOperand(1).getReg();
+ return addFrameReference(BuildMI(PPC::STFS,
+ 3).addReg(InReg), FrameIndex);
+ } else { // move -> load
+ unsigned OutReg = MI->getOperand(0).getReg();
+ return addFrameReference(BuildMI(PPC::LFS, 2, OutReg), FrameIndex);
+ }
+ }
+ return 0;
+}
+