+//---------------------------------------------------------------------------
+// Copy from a register to memory (i.e., Store). Register number must
+// be the unified register number
+//---------------------------------------------------------------------------
+
+
+void
+UltraSparcRegInfo::cpReg2MemMI(vector<MachineInstr*>& mvec,
+ unsigned SrcReg,
+ unsigned DestPtrReg,
+ int Offset, int RegType,
+ int scratchReg) const {
+ MachineInstr * MI = NULL;
+ switch( RegType ) {
+ case IntRegType:
+ assert(target.getInstrInfo().constantFitsInImmedField(STX, Offset));
+ MI = new MachineInstr(STX, 3);
+ MI->SetMachineOperandReg(0, SrcReg, false);
+ MI->SetMachineOperandReg(1, DestPtrReg, false);
+ MI->SetMachineOperandConst(2, MachineOperand:: MO_SignExtendedImmed,
+ (int64_t) Offset);
+ mvec.push_back(MI);
+ break;
+
+ case FPSingleRegType:
+ assert(target.getInstrInfo().constantFitsInImmedField(ST, Offset));
+ MI = new MachineInstr(ST, 3);
+ MI->SetMachineOperandReg(0, SrcReg, false);
+ MI->SetMachineOperandReg(1, DestPtrReg, false);
+ MI->SetMachineOperandConst(2, MachineOperand:: MO_SignExtendedImmed,
+ (int64_t) Offset);
+ mvec.push_back(MI);
+ break;
+
+ case FPDoubleRegType:
+ assert(target.getInstrInfo().constantFitsInImmedField(STD, Offset));
+ MI = new MachineInstr(STD, 3);
+ MI->SetMachineOperandReg(0, SrcReg, false);
+ MI->SetMachineOperandReg(1, DestPtrReg, false);
+ MI->SetMachineOperandConst(2, MachineOperand:: MO_SignExtendedImmed,
+ (int64_t) Offset);
+ mvec.push_back(MI);
+ break;
+
+ case IntCCRegType:
+ assert(scratchReg >= 0 && "Need scratch reg to store %ccr to memory");
+ assert(getRegType(scratchReg) ==IntRegType && "Invalid scratch reg");
+
+ // Use SrcReg+1 to get the name "%ccr" instead of "%xcc" for RDCCR
+ MI = Create2OperandInstr_Reg(RDCCR, SrcReg+1, scratchReg);
+ mvec.push_back(MI);
+
+ cpReg2MemMI(mvec, scratchReg, DestPtrReg, Offset, IntRegType);
+ break;
+
+ case FloatCCRegType:
+ assert(0 && "Tell Vikram if this assertion fails: we may have to mask out the other bits here");
+ assert(target.getInstrInfo().constantFitsInImmedField(STXFSR, Offset));
+ MI = new MachineInstr(STXFSR, 3);
+ MI->SetMachineOperandReg(0, SrcReg, false);
+ MI->SetMachineOperandReg(1, DestPtrReg, false);
+ MI->SetMachineOperandConst(2, MachineOperand:: MO_SignExtendedImmed,
+ (int64_t) Offset);
+ mvec.push_back(MI);
+ break;
+
+ default:
+ assert(0 && "Unknown RegType in cpReg2MemMI");
+ }
+}
+
+
+//---------------------------------------------------------------------------
+// Copy from memory to a reg (i.e., Load) Register number must be the unified
+// register number
+//---------------------------------------------------------------------------
+
+
+void
+UltraSparcRegInfo::cpMem2RegMI(vector<MachineInstr*>& mvec,
+ unsigned SrcPtrReg,
+ int Offset,
+ unsigned DestReg,
+ int RegType,
+ int scratchReg) const {
+ MachineInstr * MI = NULL;
+ switch (RegType) {
+ case IntRegType:
+ assert(target.getInstrInfo().constantFitsInImmedField(LDX, Offset));
+ MI = new MachineInstr(LDX, 3);
+ MI->SetMachineOperandReg(0, SrcPtrReg, false);
+ MI->SetMachineOperandConst(1, MachineOperand:: MO_SignExtendedImmed,
+ (int64_t) Offset);
+ MI->SetMachineOperandReg(2, DestReg, true);
+ mvec.push_back(MI);
+ break;
+
+ case FPSingleRegType:
+ assert(target.getInstrInfo().constantFitsInImmedField(LD, Offset));
+ MI = new MachineInstr(LD, 3);
+ MI->SetMachineOperandReg(0, SrcPtrReg, false);
+ MI->SetMachineOperandConst(1, MachineOperand:: MO_SignExtendedImmed,
+ (int64_t) Offset);
+ MI->SetMachineOperandReg(2, DestReg, true);
+ mvec.push_back(MI);
+ break;
+
+ case FPDoubleRegType:
+ assert(target.getInstrInfo().constantFitsInImmedField(LDD, Offset));
+ MI = new MachineInstr(LDD, 3);
+ MI->SetMachineOperandReg(0, SrcPtrReg, false);
+ MI->SetMachineOperandConst(1, MachineOperand:: MO_SignExtendedImmed,
+ (int64_t) Offset);
+ MI->SetMachineOperandReg(2, DestReg, true);
+ mvec.push_back(MI);
+ break;
+
+ case IntCCRegType:
+ assert(scratchReg >= 0 && "Need scratch reg to load %ccr from memory");
+ assert(getRegType(scratchReg) ==IntRegType && "Invalid scratch reg");
+ cpMem2RegMI(mvec, SrcPtrReg, Offset, scratchReg, IntRegType);
+
+ // Use DestReg+1 to get the name "%ccr" instead of "%xcc" for WRCCR
+ MI = Create2OperandInstr_Reg(WRCCR, scratchReg, DestReg+1);
+ mvec.push_back(MI);
+
+ break;
+
+ case FloatCCRegType:
+ assert(0 && "Tell Vikram if this assertion fails: we may have to mask out the other bits here");
+ assert(target.getInstrInfo().constantFitsInImmedField(LDXFSR, Offset));
+ MI = new MachineInstr(LDXFSR, 3);
+ MI->SetMachineOperandReg(0, SrcPtrReg, false);
+ MI->SetMachineOperandConst(1, MachineOperand:: MO_SignExtendedImmed,
+ (int64_t) Offset);
+ MI->SetMachineOperandReg(2, DestReg, true);
+ mvec.push_back(MI);
+ break;
+
+ default:
+ assert(0 && "Unknown RegType in cpMem2RegMI");