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Implement printing more, implement opcode output more
[oota-llvm.git]
/
lib
/
Target
/
TargetSchedInfo.cpp
diff --git
a/lib/Target/TargetSchedInfo.cpp
b/lib/Target/TargetSchedInfo.cpp
index 9eb3d98d1df481c32b9a424588c7a1afa9d3a28a..185f01ec9e859f578cf76c334de891420dc734a0 100644
(file)
--- a/
lib/Target/TargetSchedInfo.cpp
+++ b/
lib/Target/TargetSchedInfo.cpp
@@
-8,12
+8,6
@@
#include "llvm/Target/MachineSchedInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/MachineSchedInfo.h"
#include "llvm/Target/TargetMachine.h"
-// External object describing the machine instructions
-// Initialized only when the TargetMachine class is created
-// and reset when that class is destroyed.
-//
-const MachineInstrDescriptor* TargetInstrDescriptors = 0;
-
resourceId_t MachineResource::nextId = 0;
// Check if fromRVec and toRVec have *any* common entries.
resourceId_t MachineResource::nextId = 0;
// Check if fromRVec and toRVec have *any* common entries.
@@
-126,7
+120,7
@@
MachineSchedInfo::computeInstrResources(const std::vector<InstrRUsage>&
// First get the resource usage information from the class resource usages.
for (MachineOpCode op = 0; op < numOpCodes; ++op) {
InstrSchedClass sc = getSchedClass(op);
// First get the resource usage information from the class resource usages.
for (MachineOpCode op = 0; op < numOpCodes; ++op) {
InstrSchedClass sc = getSchedClass(op);
- assert(sc
>= 0 && sc
< numSchedClasses);
+ assert(sc < numSchedClasses);
instrRUsages[op] = instrRUForClasses[sc];
}
instrRUsages[op] = instrRUForClasses[sc];
}