- break;
-
- case X86II::MRM_C1:
- case X86II::MRM_C8:
- case X86II::MRM_C9:
- case X86II::MRM_E8:
- case X86II::MRM_F0:
- FinalSize += 2;
- break;
- }
-
- case X86II::MRMInitReg:
- ++FinalSize;
- // Duplicate register, used by things like MOV8r0 (aka xor reg,reg).
- FinalSize += sizeRegModRMByte();
- ++CurOp;
- break;
- }
-
- if (!Desc->isVariadic() && CurOp != NumOps) {
- std::string msg;
- raw_string_ostream Msg(msg);
- Msg << "Cannot determine size: " << MI;
- llvm_report_error(Msg.str());
- }
-
-
- return FinalSize;
-}
-
-
-unsigned X86InstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const {
- const TargetInstrDesc &Desc = MI->getDesc();
- bool IsPIC = TM.getRelocationModel() == Reloc::PIC_;
- bool Is64BitMode = TM.getSubtargetImpl()->is64Bit();
- unsigned Size = GetInstSizeWithDesc(*MI, &Desc, IsPIC, Is64BitMode);
- if (Desc.getOpcode() == X86::MOVPC32r)
- Size += GetInstSizeWithDesc(*MI, &get(X86::POP32r), IsPIC, Is64BitMode);
- return Size;
-}
-
-/// getGlobalBaseReg - Return a virtual register initialized with the
-/// the global base register value. Output instructions required to
-/// initialize the register in the function entry block, if necessary.
-///
-unsigned X86InstrInfo::getGlobalBaseReg(MachineFunction *MF) const {
- assert(!TM.getSubtarget<X86Subtarget>().is64Bit() &&
- "X86-64 PIC uses RIP relative addressing");
-
- X86MachineFunctionInfo *X86FI = MF->getInfo<X86MachineFunctionInfo>();
- unsigned GlobalBaseReg = X86FI->getGlobalBaseReg();
- if (GlobalBaseReg != 0)
- return GlobalBaseReg;
-
- // Insert the set of GlobalBaseReg into the first MBB of the function
- MachineBasicBlock &FirstMBB = MF->front();
- MachineBasicBlock::iterator MBBI = FirstMBB.begin();
- DebugLoc DL = FirstMBB.findDebugLoc(MBBI);
- MachineRegisterInfo &RegInfo = MF->getRegInfo();
- unsigned PC = RegInfo.createVirtualRegister(X86::GR32RegisterClass);
-
- const TargetInstrInfo *TII = TM.getInstrInfo();
- // Operand of MovePCtoStack is completely ignored by asm printer. It's
- // only used in JIT code emission as displacement to pc.
- BuildMI(FirstMBB, MBBI, DL, TII->get(X86::MOVPC32r), PC).addImm(0);
-
- // If we're using vanilla 'GOT' PIC style, we should use relative addressing
- // not to pc, but to _GLOBAL_OFFSET_TABLE_ external.
- if (TM.getSubtarget<X86Subtarget>().isPICStyleGOT()) {
- GlobalBaseReg = RegInfo.createVirtualRegister(X86::GR32RegisterClass);
- // Generate addl $__GLOBAL_OFFSET_TABLE_ + [.-piclabel], %some_register
- BuildMI(FirstMBB, MBBI, DL, TII->get(X86::ADD32ri), GlobalBaseReg)
- .addReg(PC).addExternalSymbol("_GLOBAL_OFFSET_TABLE_",
- X86II::MO_GOT_ABSOLUTE_ADDRESS);
- } else {
- GlobalBaseReg = PC;
- }
-
- X86FI->setGlobalBaseReg(GlobalBaseReg);
- return GlobalBaseReg;
-}
-
-X86InstrInfo::SSEDomain X86InstrInfo::GetSSEDomain(const MachineInstr *MI,
- const unsigned *&equiv) const {
- // These are the replaceable SSE instructions. Some of these have Int variants
- // that we don't include here. We don't want to replace instructions selected
- // by intrinsics.
- static const unsigned ReplaceableInstrs[][3] = {
- //PackedInt PackedSingle PackedDouble
- { X86::MOVDQAmr, X86::MOVAPSmr, X86::MOVAPDmr },
- { X86::MOVDQArm, X86::MOVAPSrm, X86::MOVAPDrm },
- { X86::MOVDQArr, X86::MOVAPSrr, X86::MOVAPDrr },
- { X86::MOVDQUmr, X86::MOVUPSmr, X86::MOVUPDmr },
- { X86::MOVDQUrm, X86::MOVUPSrm, X86::MOVUPDrm },
- { X86::MOVNTDQmr, X86::MOVNTPSmr, X86::MOVNTPDmr },
- { X86::PANDNrm, X86::ANDNPSrm, X86::ANDNPDrm },
- { X86::PANDNrr, X86::ANDNPSrr, X86::ANDNPDrr },
- { X86::PANDrm, X86::ANDPSrm, X86::ANDPDrm },
- { X86::PANDrr, X86::ANDPSrr, X86::ANDPDrr },
- { X86::PORrm, X86::ORPSrm, X86::ORPDrm },
- { X86::PORrr, X86::ORPSrr, X86::ORPDrr },
- { X86::PUNPCKHQDQrm, X86::UNPCKHPSrm, X86::UNPCKHPDrm },
- { X86::PUNPCKHQDQrr, X86::UNPCKHPSrr, X86::UNPCKHPDrr },
- { X86::PUNPCKLQDQrm, X86::UNPCKLPSrm, X86::UNPCKLPDrm },
- { X86::PUNPCKLQDQrr, X86::UNPCKLPSrr, X86::UNPCKLPDrr },
- { X86::PXORrm, X86::XORPSrm, X86::XORPDrm },
- { X86::PXORrr, X86::XORPSrr, X86::XORPDrr },