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Fix missing relocation for TLS addressing peephole optimization.
[oota-llvm.git]
/
test
/
CodeGen
/
ARM
/
str_pre-2.ll
diff --git
a/test/CodeGen/ARM/str_pre-2.ll
b/test/CodeGen/ARM/str_pre-2.ll
index 465c7e676c561cbf3d3d8d42ba2007aecb435511..5ce2bcecb4766aa36c8e89afaef7ce7ca061c23c 100644
(file)
--- a/
test/CodeGen/ARM/str_pre-2.ll
+++ b/
test/CodeGen/ARM/str_pre-2.ll
@@
-4,8
+4,9
@@
define i64 @t(i64 %a) nounwind readonly {
entry:
define i64 @t(i64 %a) nounwind readonly {
entry:
-; CHECK: str lr, [sp, #-4]!
-; CHECK: ldr lr, [sp], #4
+; CHECK: push {r4, r5, lr}
+; CHECK: pop {r4, r5, pc}
+ call void asm sideeffect "", "~{r4},~{r5}"() nounwind
%0 = load i64** @b, align 4
%1 = load i64* %0, align 4
%2 = mul i64 %1, %a
%0 = load i64** @b, align 4
%1 = load i64* %0, align 4
%2 = mul i64 %1, %a